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Signed-off-by: Hardeep Sharma --- .../bindings/pinctrl/qcom,kuno-tlmm.yaml | 109 +++++++++++++++++++++ 1 file changed, 109 insertions(+) diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,kuno-tlmm.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,kuno-tlmm.yaml new file mode 100644 index 000000000000..6db65d2e1c23 --- /dev/null +++ b/Documentation/devicetree/bindings/pinctrl/qcom,kuno-tlmm.yaml @@ -0,0 +1,109 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pinctrl/qcom,kuno-tlmm.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Technologies, Inc. Kuno TLMM block + +maintainers: + - Hardeep Sharma + +description: + Top Level Mode Multiplexer pin controller in Qualcomm Kuno SoC. + +allOf: + - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml# + +properties: + compatible: + const: qcom,kuno-tlmm + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + gpio-reserved-ranges: + minItems: 1 + maxItems: 55 + + gpio-line-names: + maxItems: 110 + +patternProperties: + "-state$": + oneOf: + - $ref: "#/$defs/qcom-kuno-tlmm-state" + - patternProperties: + "-pins$": + $ref: "#/$defs/qcom-kuno-tlmm-state" + additionalProperties: false + +$defs: + qcom-kuno-tlmm-state: + type: object + description: + Pinctrl node's client devices use subnodes for desired pin configuration. + Client device subnodes use below standard properties. + $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state + unevaluatedProperties: false + + properties: + pins: + description: + List of gpio pins affected by the properties specified in this + subnode. + items: + pattern: "^gpio([0-9]|[1-9][0-9]|10[0-9])$" + minItems: 1 + maxItems: 36 + + function: + description: + Specify the alternative function to be configured for the specified + pins. + enum: [ gpio, audio_ref_clk, coex_uart, ebi2_lcd_a, + ebi2_lcd_cs, ebi2_lcd_reset, ebi2_lcd_te, emac_mdc, emac_mdio, + emac_pps_in, emac_ptp_aux, emac_ptp_pps, gcc_gp1_clk, + gcc_gp2_clk, gcc_gp3_clk, mi2s0_data0, mi2s0_data1, mi2s0_sck, + mi2s0_ws, mi2s1_data0, mi2s1_data1, mi2s1_sck, mi2s1_ws, + mi2s_mclk, nav_gpio, pci_e_rst, + pcie_clkreq_n, pll_bist_sync, pll_clk_aux, qdss_cti_trig0, + qdss_cti_trig1, qdss_gpio_traceclk, qdss_gpio_tracectl, + qup0_se0, qup0_se1, qup0_se2, qup0_se3_mira, qup0_se3_mirb, + qup0_se4, sdc4_clk, sdc4_cmd, + sdc4_data, sdc4_tb_trig, sgmii_phy_intr, spmi_coex_clk, + spmi_coex_data, spmi_vgi_hwevent, uim1_clk, uim1_data, + uim1_present, uim1_reset, usb2phy_ac_en ] + + required: + - pins + +required: + - compatible + - reg + +unevaluatedProperties: false + +examples: + - | + #include + + tlmm: pinctrl@f000000 { + compatible = "qcom,kuno-tlmm"; + reg = <0x0f000000 0x400000>; + interrupts = ; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&tlmm 0 0 110>; + interrupt-controller; + #interrupt-cells = <2>; + + spmi-state { + pins = "gpio78", "gpio79"; + function = "spmi_vgi_hwevent"; + }; + }; +... -- 2.43.0