From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-wm1-f54.google.com (mail-wm1-f54.google.com [209.85.128.54]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id EBDFE3F329C for ; Mon, 10 Aug 2026 14:20:50 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.54 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786371653; cv=none; b=U8RhomNf7T7FPPeOtbCtUGMAN+mQTpY/fCUOyNe3vkYvDa+VBlJORZ/DMg3mXuO/5cnFvg/XjTn7Ampqz1PA8Hh5m2Hu6KEh6cemIvxCcCZvRjn5d2bExQp3Zd4wStqJTnw6wp//KLUeCgHsuN+WXUcSt/Hp83FIB7DuJ52pbIo= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786371653; c=relaxed/simple; bh=+yUD30ycHUwTl/oRnxls4RQuAguVYB7r1/ttCmM18NU=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=oPzphE1KNZQF8SlRieTBGU8eq/BvPt2THXYs6YCXpEmQ7dAcZNnDqwjhxAQPEeyItLj+5yTnKPzCzK8J04ndBsFUXitzIfUkIz5Ve8pGlqozEIWGK0BSFmSYvwW3jQ67JMY/z3G+Dzf3XhJhtW97GmBU83MHtqz+7HqufLfmSUo= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=j/r1+cv8; arc=none smtp.client-ip=209.85.128.54 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="j/r1+cv8" Received: by mail-wm1-f54.google.com with SMTP id 5b1f17b1804b1-49557167508so15981245e9.1 for ; Mon, 10 Aug 2026 07:20:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1786371649; x=1786976449; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=mUgBklvY23mceUXTKtC3ytvOgEkznOjtPrROK/VGe9c=; b=j/r1+cv8Qefi7I8kEEbyqvB1GLHt6YlpL8c0PdyTAJ4bVq43DZYeMlWAku7JRD3ulm NMatkkh9S6x5JMPdaeUDigh2j/CGmWM33QvujA1GtOGEQvyWaCzWKDKT3ClsrlbfwWma UIbu/VKEXurTmHlPkoeAAYimQsrhhOIgnG+mFxQRsTaGozSg7tnTb4uvV2l6F1gwEZXw MyIdOyS6W7svTz3ieArDA1CplrYuxrVQ7FE92S0clsqbH/YaAQZpLIkdakTa490VjFB2 VPH90VG4hrZ7se8c58lxoCehAcWLtlYV65EKFAJbgKStPpfOXYJDe/zrHTyC1QDOwl+C Jabg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1786371649; x=1786976449; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=mUgBklvY23mceUXTKtC3ytvOgEkznOjtPrROK/VGe9c=; b=Kmf7X4Zaz6KQBIlA+DAETTNmJyeQ8bIYxs23mxe+K1Ml6qksg9ivDnNaqQdJxK1nJv fxvJCyLi4N7UQthv7RepeUTMV5VzEBUgMzrjRp72aDlsjoxep+szPsFDb2eFFSIopmTK BY4UW6OfNjVdYqwP4jeQg41uFyzA7jCPJ/T7hyrXvwuEqiWahjghWioYca2/BPf3YKOM pu4uyw5+uOwAW98ofygSDfcAfqf4qJS8L7THjXUGIIWvVx0953j0WMWoAeIKPMA1wi7J zjXLnraM67J1TEwSX6udp1AaQU+w7PP/VicpmjkpIXkhLOJeGtrbQezF7AWFs8NQv9GA Hq+g== X-Forwarded-Encrypted: i=1; AHgh+RppFTazKG1Qa4mNwhNIlwSTWnn8Ys6zzcNgo1E2cuu6Ix3BhLZkVyYERw7be1IvwCeXHobCkUpvcSXaaoc=@vger.kernel.org X-Gm-Message-State: AOJu0Yzp68uECyB/deYsl0xPtl6SBWgcuTgcNbPxJ3J2DkVJCko9eJC6 qujtmBuKRNfv00jRQV4Jr0FiQh15GBv9OI6s9rhmTbH8BZzjlH9u6dOH X-Gm-Gg: AR+sD13ANQzaiDjP3b17N4BEYBGPcxQwjVQuGzpjG1Xgp9jmtG0EqNbZRub/7+UTK4l 8fo9wyTtEL3TGMHVhz0jsDP3vA9Mt2K//uosTnt+W3LfKXUT1H11rmR/ywkVrtGOw+W0LxiuL8m MQFzRqnbe59sSZq2jrMzvbahWefpPXxF18B3WyWJs3lV5gZ+6DEXSEmjnt1w3+K/EwMpVbP/K8f ytekZVTedRy949/UH88RXTAZUwbT3mw9YbXgCJ6hhCGAMwHyBdrkO3Am+A8rfxwzBMD3n7Cv4jd p6qtdiuWLCn0DUtqqCBmLc0g2bAcRrR3UMJuVtGbpjOr48bfJqVhRxZLAvRJhp94y+0TDBVZ4fv ukKVkCu7MQ5A3rSxqCAyxqWMFvUl+cisKkmR4MMhGCMg73ZFVR7FUrHXHyB/0z3eDvnX85QSzYe +CcTNJRb3X0gd3Uj/jhOudkkmr0tFHXMibWFggDs42spCNevxBB8RjvIk/Vtah3n6k9oU= X-Received: by 2002:a05:600c:a202:b0:495:7838:7e25 with SMTP id 5b1f17b1804b1-4994e7d01b1mr420429285e9.15.1786371649047; Mon, 10 Aug 2026 07:20:49 -0700 (PDT) Received: from deb05.proceq.com ([213.160.61.66]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4995919df87sm354413055e9.6.2026.08.10.07.20.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 10 Aug 2026 07:20:48 -0700 (PDT) From: Mehmet Fide To: Shawn Guo , Sascha Hauer , Stefan Agner Cc: Pengutronix Kernel Team , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Francesco Dolcini , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 0/4] ARM: dts: vf: Iris carrier board for the Colibri VF50 and VF61 Date: Mon, 10 Aug 2026 16:20:43 +0200 Message-ID: <20260810142047.2811230-1-mehmet.fide@gmail.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260810140053.2793495-1-mehmet.fide@gmail.com> References: <20260810140053.2793495-1-mehmet.fide@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit From: Mehmet Fide Mainline carries Iris carrier board device trees for every i.MX Colibri but none for the Vybrid ones, so a VF50 or VF61 on that carrier has nothing to boot with except the eval board tree. This series adds the carrier, and picks up two things on the module tree on the way. All of it is tested on a Colibri VF50 on an Iris V1.1 running 6.18.44. Changes in v2: - Document the two new board compatibles in fsl.yaml, so dtbs_check stays quiet. New patch 3, pointed out by the Sashiko review bot. - No change to the other three patches. v1: https://lore.kernel.org/all/20260810140053.2793495-1-mehmet.fide@gmail.com/ Patch 1 applies the EXT_IO pin group, which is defined in the module dtsi and referenced by nothing. It replaces a patch I sent on 2026-08-07 that hogged the group on &iomuxc; hanging it off gpio2 instead avoids the fw_devlink dependency cycle that a pin controller referencing its own child produces. Patch 2 names the SODIMM lines, as the i.MX Colibri trees already do. Patch 3 documents the carrier, patch 4 adds it. Mehmet Fide (4): ARM: dts: vf-colibri: apply the EXT_IO pin group ARM: dts: vf-colibri: name the SODIMM gpio lines dt-bindings: arm: fsl: add the Colibri VF50 and VF61 on Iris ARM: dts: vf: add Iris carrier board support for Colibri VF50 and VF61 .../devicetree/bindings/arm/fsl.yaml | 12 ++ arch/arm/boot/dts/nxp/vf/Makefile | 2 + arch/arm/boot/dts/nxp/vf/vf-colibri-iris.dtsi | 125 ++++++++++++++ arch/arm/boot/dts/nxp/vf/vf-colibri.dtsi | 153 ++++++++++++++++++ .../boot/dts/nxp/vf/vf500-colibri-iris.dts | 14 ++ .../boot/dts/nxp/vf/vf610-colibri-iris.dts | 13 ++ 6 files changed, 319 insertions(+) create mode 100644 arch/arm/boot/dts/nxp/vf/vf-colibri-iris.dtsi create mode 100644 arch/arm/boot/dts/nxp/vf/vf500-colibri-iris.dts create mode 100644 arch/arm/boot/dts/nxp/vf/vf610-colibri-iris.dts -- 2.54.0