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Tue, 11 Aug 2026 09:21:25 -0700 (PDT) Received: from ziepe.ca ([142.166.156.215]) by smtp.gmail.com with ESMTPSA id 6a1803df08f44-90a6c39254fsm2441146d6.23.2026.08.11.09.21.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 11 Aug 2026 09:21:25 -0700 (PDT) Received: from jgg by wakko with local (Exim 4.97) (envelope-from ) id 1wtpEC-00000002Y6b-1J1V; Tue, 11 Aug 2026 13:21:24 -0300 Date: Tue, 11 Aug 2026 13:21:24 -0300 From: Jason Gunthorpe To: Yu Zhang Cc: linux-kernel@vger.kernel.org, linux-hyperv@vger.kernel.org, iommu@lists.linux.dev, linux-pci@vger.kernel.org, linux-arch@vger.kernel.org, x86@kernel.org, wei.liu@kernel.org, kys@microsoft.com, haiyangz@microsoft.com, decui@microsoft.com, longli@microsoft.com, joro@8bytes.org, will@kernel.org, robin.murphy@arm.com, bhelgaas@google.com, kwilczynski@kernel.org, lpieralisi@kernel.org, mani@kernel.org, robh@kernel.org, arnd@arndb.de, mhklinux@outlook.com, jacob.pan@linux.microsoft.com, tgopinath@linux.microsoft.com, easwar.hariharan@linux.microsoft.com, mrathor@linux.microsoft.com, baolu.lu@linux.intel.com, suravee.suthikulpanit@amd.com, vasant.hegde@amd.com Subject: Re: [PATCH v3 3/5] iommu/x86: Share the architectural MSI reserved range Message-ID: <20260811162124.GK544626@ziepe.ca> References: <20260811155022.108148-1-zhangyu1@linux.microsoft.com> <20260811155022.108148-4-zhangyu1@linux.microsoft.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20260811155022.108148-4-zhangyu1@linux.microsoft.com> On Tue, Aug 11, 2026 at 11:50:19PM +0800, Yu Zhang wrote: > @@ -50,8 +50,6 @@ > #define CMD_SET_TYPE(cmd, t) ((cmd)->data[1] |= ((t) << 28)) > > /* Reserved IOVA ranges */ > -#define MSI_RANGE_START (0xfee00000) > -#define MSI_RANGE_END (0xfeefffff) > #define HT_RANGE_START (0xfd00000000ULL) > #define HT_RANGE_END (0xffffffffffULL) > > @@ -3097,8 +3095,9 @@ static void amd_iommu_get_resv_regions(struct device *dev, > list_add_tail(®ion->list, head); > } > > - region = iommu_alloc_resv_region(MSI_RANGE_START, > - MSI_RANGE_END - MSI_RANGE_START + 1, > + region = iommu_alloc_resv_region(X86_IOMMU_MSI_RANGE_START, > + X86_IOMMU_MSI_RANGE_END - > + X86_IOMMU_MSI_RANGE_START + 1, > 0, IOMMU_RESV_MSI, GFP_KERNEL); Maybe instead of adding constants you should add a iommu_alloc_resv_x86_msi_region() That is just an inline doing the above? Jason