From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from sender4-pp-f112.zoho.com (sender4-pp-f112.zoho.com [136.143.188.112]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DA55845A2A1 for ; Wed, 12 Aug 2026 14:08:18 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=pass smtp.client-ip=136.143.188.112 ARC-Seal:i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786543700; cv=pass; b=Qnrpgz6OfROCt4rIiqmpFo/Psm43qLPadXIrBRQtw4XCnLu3rNA+hJ6y1IiTbRdIARj+0lxet0X2t5G19vyxNvmUd9yOZaSkUM5X25jdKZwA0EcF/SQGWfHnkyM/VDKqGWH2UzyeohhhEk6RAk6houFXD+TuExYvRS7O/9GEDh4= ARC-Message-Signature:i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786543700; c=relaxed/simple; bh=4/EX8QRi1oSnyyACescSDX5l2PBNVtnXCbq1C5ZUHew=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=CD106+9zG/IBWARdRMhjo6ntNC2A+l2E7e0I4jOe41tH8r+U4ZM/f7QY8of4ninGr5TIoMICkKbisVGOrBFFwA8bBSYPqc6osjfFEepm1mlqe6LWOpaP1f/JJ/uDXx1S/FV6DbU/ttYqYQ+z85RBoUCrvBsyr9EHVmjM2MxlC8A= ARC-Authentication-Results:i=2; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com; spf=pass smtp.mailfrom=collabora.com; dkim=pass (1024-bit key) header.d=collabora.com header.i=nicolas.frattaroli@collabora.com header.b=UCd6c/hc; arc=pass smtp.client-ip=136.143.188.112 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=collabora.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=collabora.com header.i=nicolas.frattaroli@collabora.com header.b="UCd6c/hc" ARC-Seal: i=1; a=rsa-sha256; t=1786543668; cv=none; d=zohomail.com; s=zohoarc; b=MAlBNkGUpZ2y2UwmGLeI/nYmFJ2gAvY6ty+TjWRv179utJX2qhtMjdIceXtX8wpdW3uXlEtmkc/bhQJkcb1GePL5Kpjmi3uvOWcVlQ7ssZXeOdDNCfzkty0RxujUxzkPMU9HPPy6+I6UXEvjBPNJZsLDgz9/CX53TarggNVkkO8= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1786543668; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:MIME-Version:Message-ID:Subject:Subject:To:To:Message-Id:Reply-To; bh=4fITRmWPwYliTA04mteOIgcZ9Rsn8HY/JqMqrf0JF8w=; b=ceJHCPtzdaSQqeHHwoqV1T4ozeYz0sllYsuQC3aPOjzUYXD1upDAHcwwK+21MAlfQ39YScs7zu8ViHQx1YN1SxjZsuJbfQqiQa8Tbh+jqUZ24KQKqXj49P7QJaVL0kC/RlKdXnmh+qP6+yJ5mWLSosE4uLPSv5A1+5h9n/apIdQ= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass header.i=collabora.com; spf=pass smtp.mailfrom=nicolas.frattaroli@collabora.com; dmarc=pass header.from= DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; t=1786543668; s=zohomail; d=collabora.com; i=nicolas.frattaroli@collabora.com; h=From:From:Date:Date:Subject:Subject:MIME-Version:Content-Type:Content-Transfer-Encoding:Message-Id:Message-Id:In-Reply-To:To:To:Cc:Cc:Reply-To; bh=4fITRmWPwYliTA04mteOIgcZ9Rsn8HY/JqMqrf0JF8w=; b=UCd6c/hc79kPU/F2ZHLR9gE6oinAQ0QFdyis8jBL4R8U/+7oegLkJjz95KE3+YPG GMJS6iY6DFQrA9a1egX9UYfGNXqrAstH+EHiCSdZnmCw9QA1QWtRxxsmA5bAxFBdPDI 5IIhnBcDgvJEitjFAVxQSToBh5YEHpiOwSxgmIis= Received: by mx.zohomail.com with SMTPS id 1786543665869804.8658229040461; Wed, 12 Aug 2026 07:07:45 -0700 (PDT) From: Nicolas Frattaroli Date: Wed, 12 Aug 2026 16:07:19 +0200 Subject: [PATCH v4 2/3] drm/panthor: Revisit reqs_lock handling in flush/reset paths Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260812-panthor-cache-flush-fix-v4-2-751e32901898@collabora.com> References: <20260812-panthor-cache-flush-fix-v4-0-751e32901898@collabora.com> In-Reply-To: <20260812-panthor-cache-flush-fix-v4-0-751e32901898@collabora.com> To: Boris Brezillon , Steven Price , Liviu Dudau , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Grant Likely , Heiko Stuebner Cc: linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, kernel@collabora.com, Nicolas Frattaroli X-Mailer: b4 0.15.2 panthor_gpu_flush_caches() and panthor_gpu_soft_reset() acquire their reqs_lock spinlock with the IRQ-disabling variants of the spinlocking functions. This isn't necessary, as the lock is never taken from an atomic context, as Panthor uses threaded interrupt handlers. The result of this overly strict locking is that IRQs may be disabled more frequently and for longer than they should be, resulting in increased system latency. Switch the locking to use non-IRQ-disabling scoped_guard statements for locking. The wait_event_timeout read of pending_reqs outside of the spinlock is fine as wait_event_timeout is a memory barrier according to the Linux Memory Model. Fixes: 5cd894e258c4 ("drm/panthor: Add the GPU logical block") Reviewed-by: Boris Brezillon Signed-off-by: Nicolas Frattaroli --- drivers/gpu/drm/panthor/panthor_gpu.c | 72 ++++++++++++++++------------------- 1 file changed, 33 insertions(+), 39 deletions(-) diff --git a/drivers/gpu/drm/panthor/panthor_gpu.c b/drivers/gpu/drm/panthor/panthor_gpu.c index 7088371c6d64..55e33f145b40 100644 --- a/drivers/gpu/drm/panthor/panthor_gpu.c +++ b/drivers/gpu/drm/panthor/panthor_gpu.c @@ -345,41 +345,36 @@ int panthor_gpu_flush_caches(struct panthor_device *ptdev, u32 l2, u32 lsc, u32 other) { struct panthor_gpu *gpu = ptdev->gpu; - unsigned long flags; u64 start = 0; int ret = 0; /* Serialize cache flush operations. */ guard(mutex)(&ptdev->gpu->cache_flush_lock); - spin_lock_irqsave(&ptdev->gpu->reqs_lock, flags); - - if (tracepoint_enabled(gpu_cache_flush)) - start = ktime_get_ns(); - - if (!(ptdev->gpu->pending_reqs & GPU_IRQ_CLEAN_CACHES_COMPLETED)) { - ptdev->gpu->pending_reqs |= GPU_IRQ_CLEAN_CACHES_COMPLETED; - gpu_write(gpu->iomem, GPU_CMD, GPU_FLUSH_CACHES(l2, lsc, other)); - } else { - ret = -EIO; - } - spin_unlock_irqrestore(&ptdev->gpu->reqs_lock, flags); - - if (ret) { - panthor_gpu_emit_flush_caches_tp(ptdev, start, l2, lsc, other, ret); - return ret; + scoped_guard(spinlock, &ptdev->gpu->reqs_lock) { + if (tracepoint_enabled(gpu_cache_flush)) + start = ktime_get_ns(); + + if (!(ptdev->gpu->pending_reqs & GPU_IRQ_CLEAN_CACHES_COMPLETED)) { + ptdev->gpu->pending_reqs |= GPU_IRQ_CLEAN_CACHES_COMPLETED; + gpu_write(gpu->iomem, GPU_CMD, GPU_FLUSH_CACHES(l2, lsc, other)); + } else { + panthor_gpu_emit_flush_caches_tp(ptdev, start, l2, lsc, + other, -EIO); + return -EIO; + } } if (!wait_event_timeout(ptdev->gpu->reqs_acked, !(ptdev->gpu->pending_reqs & GPU_IRQ_CLEAN_CACHES_COMPLETED), msecs_to_jiffies(100))) { - spin_lock_irqsave(&ptdev->gpu->reqs_lock, flags); - if ((ptdev->gpu->pending_reqs & GPU_IRQ_CLEAN_CACHES_COMPLETED) != 0 && - !(gpu_read(gpu->irq.iomem, INT_RAWSTAT) & GPU_IRQ_CLEAN_CACHES_COMPLETED)) - ret = -ETIMEDOUT; - else - ptdev->gpu->pending_reqs &= ~GPU_IRQ_CLEAN_CACHES_COMPLETED; - spin_unlock_irqrestore(&ptdev->gpu->reqs_lock, flags); + scoped_guard(spinlock, &ptdev->gpu->reqs_lock) { + if ((ptdev->gpu->pending_reqs & GPU_IRQ_CLEAN_CACHES_COMPLETED) != 0 && + !(gpu_read(gpu->irq.iomem, INT_RAWSTAT) & GPU_IRQ_CLEAN_CACHES_COMPLETED)) + ret = -ETIMEDOUT; + else + ptdev->gpu->pending_reqs &= ~GPU_IRQ_CLEAN_CACHES_COMPLETED; + } } panthor_gpu_emit_flush_caches_tp(ptdev, start, l2, lsc, other, ret); @@ -402,27 +397,26 @@ int panthor_gpu_soft_reset(struct panthor_device *ptdev) { struct panthor_gpu *gpu = ptdev->gpu; bool timedout = false; - unsigned long flags; - spin_lock_irqsave(&ptdev->gpu->reqs_lock, flags); - if (!drm_WARN_ON(&ptdev->base, - ptdev->gpu->pending_reqs & GPU_IRQ_RESET_COMPLETED)) { - ptdev->gpu->pending_reqs |= GPU_IRQ_RESET_COMPLETED; - gpu_write(gpu->irq.iomem, INT_CLEAR, GPU_IRQ_RESET_COMPLETED); - gpu_write(gpu->iomem, GPU_CMD, GPU_SOFT_RESET); + scoped_guard(spinlock, &ptdev->gpu->reqs_lock) { + if (!drm_WARN_ON(&ptdev->base, + ptdev->gpu->pending_reqs & GPU_IRQ_RESET_COMPLETED)) { + ptdev->gpu->pending_reqs |= GPU_IRQ_RESET_COMPLETED; + gpu_write(gpu->irq.iomem, INT_CLEAR, GPU_IRQ_RESET_COMPLETED); + gpu_write(gpu->iomem, GPU_CMD, GPU_SOFT_RESET); + } } - spin_unlock_irqrestore(&ptdev->gpu->reqs_lock, flags); if (!wait_event_timeout(ptdev->gpu->reqs_acked, !(ptdev->gpu->pending_reqs & GPU_IRQ_RESET_COMPLETED), msecs_to_jiffies(100))) { - spin_lock_irqsave(&ptdev->gpu->reqs_lock, flags); - if ((ptdev->gpu->pending_reqs & GPU_IRQ_RESET_COMPLETED) != 0 && - !(gpu_read(gpu->irq.iomem, INT_RAWSTAT) & GPU_IRQ_RESET_COMPLETED)) - timedout = true; - else - ptdev->gpu->pending_reqs &= ~GPU_IRQ_RESET_COMPLETED; - spin_unlock_irqrestore(&ptdev->gpu->reqs_lock, flags); + scoped_guard(spinlock, &ptdev->gpu->reqs_lock) { + if ((ptdev->gpu->pending_reqs & GPU_IRQ_RESET_COMPLETED) != 0 && + !(gpu_read(gpu->irq.iomem, INT_RAWSTAT) & GPU_IRQ_RESET_COMPLETED)) + timedout = true; + else + ptdev->gpu->pending_reqs &= ~GPU_IRQ_RESET_COMPLETED; + } } if (timedout) { -- 2.55.0