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Wed, 12 Aug 2026 04:53:03 -0700 (PDT) From: Subrat Pandey To: , CC: , , , , , , , , , Subject: [PATCH net v3 1/2] octeontx2-pf: Fix aura BPID assignment when CONFIG_DCB is enabled Date: Wed, 12 Aug 2026 17:22:57 +0530 Message-ID: <20260812115258.773319-2-subratp@marvell.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260812115258.773319-1-subratp@marvell.com> References: <20260812115258.773319-1-subratp@marvell.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Proofpoint-Spam-Info: AW1haW4tMjYwODEyMDA5NiBTYWx0ZWRfX7U0wKkMBy30p 8b4/rgL2+jFMYZE5L0IBNu2tGZRMfDMsFQDKrqHCZpInVsVyK2LkfgnGnvwnh8gYHtu15gOXcv9 KFz9pkkBPzhBYRbFJ6eMEhwoggFXPp0= X-Proofpoint-ORIG-GUID: sTkw4pfDlYkvYavEolN9Nr1xnHAORZwJ X-Proofpoint-GUID: sTkw4pfDlYkvYavEolN9Nr1xnHAORZwJ X-Authority-Analysis: v=2.4 cv=EIQ2FVZC c=1 sm=1 tr=0 ts=6a7c5ea4 cx=c_pps a=rEv8fa4AjpPjGxpoe8rlIQ==:117 a=rEv8fa4AjpPjGxpoe8rlIQ==:17 a=Sv0fKeRqtYgA:10 a=VkNPw1HP01LnGYTKEx00:22 a=l0iWHRpgs5sLHlkKQ1IR:22 a=TtqV-g6YmW1Jfm2GSLaY:22 a=M5GUcnROAAAA:8 a=JC75Ts7hcnNMBKXiZ1QA:9 a=OBjm3rFKGHvpk9ecZwUJ:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwODEyMDA5NiBTYWx0ZWRfXwmjuuoNRcJ0n OXwMBiu1wNVrEqqS/v31n97iCXd5wDiUsZq8Y/qhvyd+vMgZzYx/XIaJ8+UYObe/Kz0Xt0PQJQJ ZTIRe+ZG3tQgpFSl63o6YaFxRqKlFMn4M9bN9sP9TRLfUPsKryCEq4l/UtASwHkKPmUTQ5mFUT0 b/9FCoTQH38a+cOj74wgIA8uJSXIHnyEWXFruGdjCk796n1cgJqM+tfA9XPM7thqaf9WuDdO+lQ 3/mDHq2TgPfFoDtLOklMgb69g8yFVyTy+aEHDlLZlZBlfZL3MnrESgP+/IIOrL3zLGFRKznXNqp /9djnwzVRJiaTDAC5MC1KLYGGZVRob3Ei/skurc6eBXQ1LdV6jZQR7w+HES9U11hPNJw4n4NUiO g8ThJqESi30f4BF72b8RMtBSqMn66AlQEO7bldvbiw9zH+GdSq0bRb0QfWytF14N1bQ+ssLs684 dPhduGzbqDi6bcaIUgA== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-08-12_03,2026-08-12_01,2025-10-01_01 From: Geetha sowjanya Previously, BPID assignment under CONFIG_DCB assumed `queue_to_pfc_map` was always initialized. For SDP VFs this leads to invalid memory access as it was not initialized. This patch adds a NULL check for `queue_to_pfc_map` before dereferencing it. Also, simplifies the logic by always assigning a default BPID first, then conditionally overriding it if CONFIG_DCB is enabled and the map exists. Fixes: 184fb40f731b ("octeontx2-pf: Avoid adding dcbnl_ops for LBK and SDP vf") Signed-off-by: Geetha sowjanya Signed-off-by: Subrat Pandey --- v3: - Unify BPID index logic into a shared otx2_get_bpid_idx() helper, dropping the per-file #ifdef CONFIG_DCB and cn20k_aura_bpid_idx(). - Drop trailing period from the Fixes: tag. .../net/ethernet/marvell/octeontx2/nic/cn20k.c | 11 +---------- .../ethernet/marvell/octeontx2/nic/otx2_common.c | 16 ++++++---------- .../ethernet/marvell/octeontx2/nic/otx2_common.h | 8 ++++++++ 3 files changed, 15 insertions(+), 20 deletions(-) diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/cn20k.c b/drivers/net/ethernet/marvell/octeontx2/nic/cn20k.c index dbf173196608..65248bb0b61d 100644 --- a/drivers/net/ethernet/marvell/octeontx2/nic/cn20k.c +++ b/drivers/net/ethernet/marvell/octeontx2/nic/cn20k.c @@ -242,15 +242,6 @@ int cn20k_register_pfvf_mbox_intr(struct otx2_nic *pf, int numvfs) #define RQ_BP_LVL_AURA (255 - ((85 * 256) / 100)) /* BP when 85% is full */ -static u8 cn20k_aura_bpid_idx(struct otx2_nic *pfvf, int aura_id) -{ -#ifdef CONFIG_DCB - return pfvf->queue_to_pfc_map[aura_id]; -#else - return 0; -#endif -} - static int cn20k_tc_get_entry_index(struct otx2_flow_config *flow_cfg, struct otx2_tc_flow *node) { @@ -580,7 +571,7 @@ static int cn20k_aura_aq_init(struct otx2_nic *pfvf, int aura_id, if (pfvf->nix_blkaddr == BLKADDR_NIX1) aq->aura.bp_ena = 1; - bpid_idx = cn20k_aura_bpid_idx(pfvf, aura_id); + bpid_idx = otx2_get_bpid_idx(pfvf, aura_id); aq->aura.bpid = pfvf->bpid[bpid_idx]; /* Set backpressure level for RQ's Aura */ diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.c b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.c index 3d253132a17f..142e331cff9e 100644 --- a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.c +++ b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.c @@ -1055,6 +1055,7 @@ int otx2_cq_init(struct otx2_nic *pfvf, u16 qidx) struct nix_aq_enq_req *aq; struct otx2_cq_queue *cq; struct otx2_pool *pool; + u8 bpid_idx; cq = &qset->cq[qidx]; cq->cq_idx = qidx; @@ -1132,11 +1133,8 @@ int otx2_cq_init(struct otx2_nic *pfvf, u16 qidx) if (!is_otx2_lbkvf(pfvf->pdev)) { /* Enable receive CQ backpressure */ aq->cq.bp_ena = 1; -#ifdef CONFIG_DCB - aq->cq.bpid = pfvf->bpid[pfvf->queue_to_pfc_map[qidx]]; -#else - aq->cq.bpid = pfvf->bpid[0]; -#endif + bpid_idx = otx2_get_bpid_idx(pfvf, qidx); + aq->cq.bpid = pfvf->bpid[bpid_idx]; /* Set backpressure level is same as cq pass level */ aq->cq.bp = RQ_PASS_LVL_CQ(pfvf->hw.rq_skid, qset->rqe_cnt); @@ -1378,6 +1376,7 @@ int otx2_aura_aq_init(struct otx2_nic *pfvf, int aura_id, { struct npa_aq_enq_req *aq; struct otx2_pool *pool; + u8 bpid_idx; int err; pool = &pfvf->qset.pool[pool_id]; @@ -1433,11 +1432,8 @@ int otx2_aura_aq_init(struct otx2_nic *pfvf, int aura_id, */ if (pfvf->nix_blkaddr == BLKADDR_NIX1) aq->aura.bp_ena = 1; -#ifdef CONFIG_DCB - aq->aura.nix0_bpid = pfvf->bpid[pfvf->queue_to_pfc_map[aura_id]]; -#else - aq->aura.nix0_bpid = pfvf->bpid[0]; -#endif + bpid_idx = otx2_get_bpid_idx(pfvf, aura_id); + aq->aura.nix0_bpid = pfvf->bpid[bpid_idx]; /* Set backpressure level for RQ's Aura */ aq->aura.bp = RQ_BP_LVL_AURA; diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h index eecee612b7b2..e6918252cca4 100644 --- a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h +++ b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h @@ -1029,6 +1029,14 @@ static inline int otx2_tc_flower_rule_cnt(struct otx2_nic *pfvf) return pfvf->flow_cfg->nr_flows; } +static u8 otx2_get_bpid_idx(struct otx2_nic *pfvf, int qidx) +{ + if (IS_ENABLED(CONFIG_DCB)) + return pfvf->queue_to_pfc_map[qidx]; + + return 0; +} + /* MSI-X APIs */ void otx2_free_cints(struct otx2_nic *pfvf, int n); void otx2_set_cints_affinity(struct otx2_nic *pfvf); -- 2.43.0