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[103.229.18.19]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-3931cd46309sm4300696a91.5.2026.08.13.10.33.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 13 Aug 2026 10:33:34 -0700 (PDT) From: Vishnu Saini Date: Thu, 13 Aug 2026 23:03:21 +0530 Subject: [PATCH v2 2/3] arm64: dts: qcom: monaco-evk: Add LVDS display overlay Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260813-lvds-support-v2-2-6b11035e8ab0@oss.qualcomm.com> References: <20260813-lvds-support-v2-0-6b11035e8ab0@oss.qualcomm.com> In-Reply-To: <20260813-lvds-support-v2-0-6b11035e8ab0@oss.qualcomm.com> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Vishnu Saini , venkata.valluru@oss.qualcomm.com, Jessica Zhang X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1786642402; l=4369; i=vishnu.saini@oss.qualcomm.com; s=20251113; h=from:subject:message-id; bh=Q16+3oz/XJnMkpZazfrAtRiGRJDZnTiYRe4D7n05tKM=; b=EOpdOh6Rfit5g0OLwueveFJ3zi8zwLGMewEWj6Pk3NHeaiuxl47YKST6Fqu1uIC8js/Q2v/lg s/H/Ve1QUzXDKVAfC1S1UGLNwpiPOyLb2mXgT3yfyiGqZono/QZ9cTp X-Developer-Key: i=vishnu.saini@oss.qualcomm.com; a=ed25519; pk=8hlXlF8j/3GeOaDK3w2LYhkv9FanCQru0c7kRH/It7k= X-Authority-Analysis: v=2.4 cv=Ovh/DS/t c=1 sm=1 tr=0 ts=6a7dfff0 cx=c_pps a=0uOsjrqzRL749jD1oC5vDA==:117 a=Ou0eQOY4+eZoSc0qltEV5Q==:17 a=IkcTkHD0fZMA:10 a=Sv0fKeRqtYgA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=yx91gb_oNiZeI1HMLzn7:22 a=EUspDBNiAAAA:8 a=Jm0fHEQTX3kIzYgV1EAA:9 a=QEXdDO2ut3YA:10 a=mQ_c8vxmzFEMiUWkPHU9:22 X-Proofpoint-Spam-Info: AW1haW4tMjYwODEzMDEyNiBTYWx0ZWRfX5wueUZ6PYatP u0mYLtjTaUJXmuV3gl85ztYaVdL1xV6kALupuD6QfhiNwd4AknEsxtHMfarXDUPcZm1PPc6N3if Fc3/5hDosdGW0E0TR/CI60rnAfNVcGE= X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwODEzMDEyNiBTYWx0ZWRfX1yXR55FkiwZ/ ZSPUp7OLFfqKjJBRXXZ5SWH7ZC2GCTP538DuVh6uJ30jAwn42Bxyrmk1vnNEa7OZHLGneVpoTig CUU5uwOorMGNU5EbuyWewRzslaDfrNWAjvcXuv7g1/9ZL2dZFZfI9rGtdS7jJxOyRCnzjE3Ttkp GCa/Q28a631n5g3SQtZLgVTSsiLUsRJOT59IAYp83tcV9RcLlSR2fHQCZ6MPOpYcYK5wGb0mtjE klIx8twpXO+xGoq5d3Ak0BU67Sz+WWowT0fmf8a1stMHVOll6YJG+fHhyJX8MQwp3YlYawZ0gVv p3EkjlLcWLyFCbNgNySlRWRTQMpZ+2vZZildfpnvAVfRgEIteGewV/o/9VB6tpxRwjArYpiHlPE ZTKVKDlHXQSrYGfjfBejBo85lbb+PkD9efYtUAIzixbBp5ktZ4TD8GGwdyZVcFIJkIoM9Ly0Awy yzMZqGabV+vhxmpgIFQ== X-Proofpoint-ORIG-GUID: kBMlpMtDuAQQrYFhLawpyu6L0SqEXzmI X-Proofpoint-GUID: kBMlpMtDuAQQrYFhLawpyu6L0SqEXzmI X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-08-13_05,2026-08-12_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 spamscore=0 clxscore=1015 phishscore=0 lowpriorityscore=0 suspectscore=0 malwarescore=0 priorityscore=1501 adultscore=0 bulkscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2608130126 The Monaco-EVK mezzanine supports LVDS display output using the Lontium LT9211C DSI-to-LVDS bridge. The bridge is connected to the DSI0 output and drives a dual-channel 1920x1080 LVDS panel in VESA-24 mapping. Add a DTBO overlay, monaco-evk-lvds-boe,dv215fhm-r01.dtso, that wires up the LT9211C bridge on I2C8 (address 0x2d) with reset on GPIO66, a panel-lvds node for the boe,dv215fhm-r01 panel (matched against the panel-simple-lvds-dual-ports binding, which supplies the panel's size and timing internally), and an LCD display bias regulator supplied through the GPIO expander. DSI power is provided by vreg_l5a. The overlay is built as a composite DTB combining the base monaco-evk.dtb, the IFP mezzanine overlay, and this LVDS overlay. Signed-off-by: Vishnu Saini --- arch/arm64/boot/dts/qcom/Makefile | 4 + .../dts/qcom/monaco-evk-lvds-boe,dv215fhm-r01.dtso | 117 +++++++++++++++++++++ 2 files changed, 121 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile index 2c4e7a891717..85ee28d8f109 100644 --- a/arch/arm64/boot/dts/qcom/Makefile +++ b/arch/arm64/boot/dts/qcom/Makefile @@ -73,6 +73,10 @@ monaco-evk-el2-dtbs := monaco-evk.dtb monaco-el2.dtbo dtb-$(CONFIG_ARCH_QCOM) += monaco-evk-el2.dtb monaco-evk-ifp-mezzanine-dtbs := monaco-evk.dtb monaco-evk-ifp-mezzanine.dtbo dtb-$(CONFIG_ARCH_QCOM) += monaco-evk-ifp-mezzanine.dtb + +monaco-evk-lvds-boe,dv215fhm-r01-dtbs := monaco-evk.dtb monaco-evk-ifp-mezzanine.dtbo monaco-evk-lvds-boe,dv215fhm-r01.dtbo +dtb-$(CONFIG_ARCH_QCOM) += monaco-evk-lvds-boe,dv215fhm-r01.dtb + dtb-$(CONFIG_ARCH_QCOM) += msm8216-samsung-fortuna3g.dtb dtb-$(CONFIG_ARCH_QCOM) += msm8916-acer-a1-724.dtb dtb-$(CONFIG_ARCH_QCOM) += msm8916-alcatel-idol347.dtb diff --git a/arch/arm64/boot/dts/qcom/monaco-evk-lvds-boe,dv215fhm-r01.dtso b/arch/arm64/boot/dts/qcom/monaco-evk-lvds-boe,dv215fhm-r01.dtso new file mode 100644 index 000000000000..96a53a294863 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/monaco-evk-lvds-boe,dv215fhm-r01.dtso @@ -0,0 +1,117 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +/dts-v1/; +/plugin/; + +#include + +&{/} { + model = "Qualcomm Technologies, Inc. Monaco EVK LVDS"; + + panel_lvds: panel-lvds { + compatible = "boe,dv215fhm-r01"; + power-supply = <&lcd_disp_bias>; + + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + dual-lvds-odd-pixels; + panel_in_lvds_odd: endpoint { + remote-endpoint = <<9211c_out_odd>; + }; + }; + + port@1 { + reg = <1>; + dual-lvds-even-pixels; + panel_in_lvds_even: endpoint { + remote-endpoint = <<9211c_out_even>; + }; + }; + }; + }; + + lcd_disp_bias: regulator-lcd-disp-bias { + compatible = "regulator-fixed"; + regulator-name = "lcd_disp_bias"; + regulator-min-microvolt = <5500000>; + regulator-max-microvolt = <5500000>; + gpio = <&expander3 1 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; +}; + +&i2c8 { + #address-cells = <1>; + #size-cells = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&qup_i2c8_data_clk>; + + status = "okay"; + + lt9211c_codec: lvds-bridge@2d { + compatible = "lontium,lt9211c"; + reg = <0x2d>; + reset-gpios = <&tlmm 66 GPIO_ACTIVE_HIGH>; + vccio-supply = <&vreg_l5a>; + + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + lt9211c_in: endpoint { + data-lanes = <1 2 3 4>; + remote-endpoint = <&mdss_dsi0_out>; + }; + }; + + port@2 { + reg = <2>; + lt9211c_out_odd: endpoint { + remote-endpoint = <&panel_in_lvds_odd>; + }; + }; + + port@3 { + reg = <3>; + lt9211c_out_even: endpoint { + remote-endpoint = <&panel_in_lvds_even>; + }; + }; + }; + }; +}; + +&mdss { + status = "okay"; +}; + +&mdss_dsi0 { + vdda-supply = <&vreg_l5a>; + + status = "okay"; +}; + +&mdss_dsi0_out { + data-lanes = <0 1 2 3>; + remote-endpoint = <<9211c_in>; +}; + +&mdss_dsi0_phy { + vdds-supply = <&vreg_l4a>; + + status = "okay"; +}; + -- 2.34.1