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[86.96.6.50]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-49989ae9618sm1475095e9.13.2026.08.13.23.08.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 13 Aug 2026 23:08:37 -0700 (PDT) From: Abid Ali Date: Fri, 14 Aug 2026 06:07:55 +0000 Subject: [PATCH net-next v4 3/3] net: stmmac: xgmac: decouple the MAC Rx/Tx enables from the DMA ops Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260814-stmmac-rx-fifo-block-v4-3-1951fd3d33b7@gmail.com> References: <20260814-stmmac-rx-fifo-block-v4-0-1951fd3d33b7@gmail.com> In-Reply-To: <20260814-stmmac-rx-fifo-block-v4-0-1951fd3d33b7@gmail.com> To: Andrew Lunn , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Maxime Coquelin , Alexandre Torgue , Russell King , Qingfang Deng , Maxime Chevallier Cc: netdev@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Abid Ali X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1786687705; l=2086; i=dev.taqnialabs@gmail.com; s=20260425; h=from:subject:message-id; bh=0Vwj+Yf7E1Ji8YvFOtq75mgQ/Wgtg5/pWR1g1XG9zro=; b=LnFwns+EYkt/RIAKFdCfRUKmnaV61xN7S2an1VxP7zn2xuNjez526gMQes2zTFI9XOaZ6kK4H 5/E/AvF2/T7AGDRwZWlVD+q5/OhyACmoDs/5PWIlyCnPGg7tS+Xwabl X-Developer-Key: i=dev.taqnialabs@gmail.com; a=ed25519; pk=4Syx51HH/MOySSUpi79M2ToLOdwt1yiNb338eKZBJNk= The XGMAC per-channel DMA start and stop ops also raise and lower MAC_Tx_Configuration.TE and MAC_Rx_Configuration.RE. Those bits are global, not per channel, so an op meant to touch one channel reconfigures the whole MAC. stmmac_tx_err() restarting a single Tx channel clears TE and stops transmit on every other channel too. Signed-off-by: Abid Ali --- drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c | 12 ------------ 1 file changed, 12 deletions(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c index df366b2e6bd7..ba4f535fb9eb 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c @@ -268,10 +268,6 @@ static void dwxgmac2_dma_start_tx(struct stmmac_priv *priv, value = readl(ioaddr + XGMAC_DMA_CH_TX_CONTROL(chan)); value |= XGMAC_TXST; writel(value, ioaddr + XGMAC_DMA_CH_TX_CONTROL(chan)); - - value = readl(ioaddr + XGMAC_TX_CONFIG); - value |= XGMAC_CONFIG_TE; - writel(value, ioaddr + XGMAC_TX_CONFIG); } static void dwxgmac2_dma_stop_tx(struct stmmac_priv *priv, void __iomem *ioaddr, @@ -282,10 +278,6 @@ static void dwxgmac2_dma_stop_tx(struct stmmac_priv *priv, void __iomem *ioaddr, value = readl(ioaddr + XGMAC_DMA_CH_TX_CONTROL(chan)); value &= ~XGMAC_TXST; writel(value, ioaddr + XGMAC_DMA_CH_TX_CONTROL(chan)); - - value = readl(ioaddr + XGMAC_TX_CONFIG); - value &= ~XGMAC_CONFIG_TE; - writel(value, ioaddr + XGMAC_TX_CONFIG); } static void dwxgmac2_dma_start_rx(struct stmmac_priv *priv, @@ -299,10 +291,6 @@ static void dwxgmac2_dma_start_rx(struct stmmac_priv *priv, value = readl(ioaddr + XGMAC_DMA_CH_RX_CONTROL(chan)); value |= XGMAC_RXST; writel(value, ioaddr + XGMAC_DMA_CH_RX_CONTROL(chan)); - - value = readl(ioaddr + XGMAC_RX_CONFIG); - value |= XGMAC_CONFIG_RE; - writel(value, ioaddr + XGMAC_RX_CONFIG); } static void dwxgmac2_dma_stop_rx(struct stmmac_priv *priv, void __iomem *ioaddr, -- 2.43.0