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[80.73.162.2]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-5b458beda8esm1070671e87.54.2026.08.15.04.37.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 15 Aug 2026 04:37:03 -0700 (PDT) From: Andrey Golovko To: Shenghao Ding , Kevin Lu , Baojun Xu , Sen Wang , Liam Girdwood , Mark Brown , Jaroslav Kysela , Takashi Iwai Cc: "Holalu Yogendra, Niranjan" , Pierre-Louis Bossart , Charles Keepax , Vijendar Mukunda , Antoine Monnet , Robin Everaars , Ville Saarinen , linux-sound@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 0/2] ASoC: tas2783-sdw: fix the read-only Control handling Date: Sat, 15 Aug 2026 14:40:00 +0300 Message-ID: <20260815112000.4180-1-andrey.golovko@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The 1/2 of v2 is in for-7.3 as 0c7aeb0f5ece, so this is the rest of it, rebased on that, with one more patch in front. Mark asked whether marking the read-only Controls volatile works for multi-byte reads. It does not, on its own. Twenty of the Controls that patch marks volatile are wider than one byte: nineteen of four - the Latency of FU23, FU26 and FU127, XU22 0x06, SAPU29 0x05, PPU21 and PPU26 0x06, the 0x08 Control of IT21, IT26, IT28, IT29, OT23, OT24, OT25, OT28 and OT127, MU26 0x06, MFPU21 and MFPU26 0x08 - and XU22 0x07 of two. With val_bits = 8 the MBQ layer refuses each of them before anything reaches the bus, so the patch on its own would turn a read that used to be answered from the cache into -EINVAL. What the cache answered was the placeholder from tas2783_reg_default[] rather than anything the device had said, and the driver performs no register reads at all, so nothing in tree can tell the difference today - but -EINVAL is not what the patch should leave behind. 1/2 widens val_bits to 32 and repairs the one place that relied on the old width, the calibration write, which used regmap_bulk_write() to spread a four-byte value over four one-byte registers. Both patches have been running on an ASUS ProArt PX13 (HN7306EAC, two TAS2783 on one AMD ACP link) since 13 August - the 2/2 in that kernel is the pre-v2 one, differing only in the File Download Status handling. Playback, suspend to idle and the calibration path are unaffected. Andrey Golovko (2): ASoC: tas2783-sdw: make multi-byte MBQ registers reachable ASoC: tas2783-sdw: do not cache read-only Controls sound/soc/codecs/tas2783-sdw.c | 105 +++++++++++++++++---------------- 1 file changed, 55 insertions(+), 50 deletions(-) base-commit: 0c7aeb0f5eceb95b5887bd8e83fef865e5a49a13 -- 2.53.0