From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from m16.mail.163.com (m16.mail.163.com [220.197.31.4]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D716A182D6 for ; Sun, 16 Aug 2026 14:23:34 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=220.197.31.4 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786890218; cv=none; b=E+cZoFFA5af34Km/BXDhDxB9GG68s5CE5HzkCoCO/Wqbgcf7QjYq7jXioR/nCKX1uyq+Viirj5xsFLa/MGgfnf4b/1GDdnf7s82MHWJ/e2j4fmhvarzmyszjVmU0eYvyHkzVf3jVbO+Y8yvjv8m93UBHBZ5399Ysjjbf2k4aIOc= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786890218; c=relaxed/simple; bh=H+cW3lYQnfv97gMknN9b0aco/VisYp6She74jeBYghs=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=LXe+1t+4qaiy8fPPEm4RcOt9EsqcEf0mFk9mJ09NDcxBJbj3wA7KeJ7pzJsRfhjqIuppfR5110+XJqqCP6fK+8iHe5nw1Ou6yhlo4Ih+MbMOR9ZsAUWU5ZcPRkJbhxQX9LTBTdFF96iZ7rrnJSeSsqsa5NH9oOUvzpph4MDGC1Y= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=163.com; spf=pass smtp.mailfrom=163.com; dkim=pass (1024-bit key) header.d=163.com header.i=@163.com header.b=RCsQ4A7U; arc=none smtp.client-ip=220.197.31.4 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=163.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=163.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=163.com header.i=@163.com header.b="RCsQ4A7U" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=163.com; s=s110527; h=From:To:Subject:Date:Message-ID:MIME-Version; bh=JN OBC7olMLbrXH1GbdTgWDhAhDx9tYCg2+8zYiTEdiU=; b=RCsQ4A7UBQLPmou6g3 Vgqwp6vpB0r/BpJFxTx6vs2beAk+mtllm9qGIFJaD5gpaH8f8fgJCWcx1IaQ4kF8 yi1wlOpkoaXIGfFz/myOXRzDjDOOyePV03OCQikwVyBWwL5iZIcXRhXNLLBYVEdH Le706WT4kK7UGO2W/+bRpjMGc= Received: from fedora (unknown []) by gzsmtp4 (Coremail) with SMTP id PygvCgD3nzeux4Fqz9GcMg--.39607S2; Sun, 16 Aug 2026 22:22:40 +0800 (CST) From: Ju Nan To: junan76@163.com, radu@rendec.net Cc: alexandre.torgue@foss.st.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, mcoquelin.stm32@gmail.com, tglx@kernel.org Subject: [PATCH v2] irqchip/stm32mp-exti: fix the unit of the hwspinlock timeout Date: Sun, 16 Aug 2026 22:20:08 +0800 Message-ID: <20260816142007.25338-2-junan76@163.com> X-Mailer: git-send-email 2.55.0 In-Reply-To: <20260805032139.35420-2-junan76@163.com> References: <20260805032139.35420-2-junan76@163.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-CM-TRANSID:PygvCgD3nzeux4Fqz9GcMg--.39607S2 X-Coremail-Antispam: 1Uf129KBjvJXoW7KF4fXFyxCFWfKw4DWr4UArb_yoW8ZF18pF W5t3sYywn3Wa4jya1vyF4qgFy5Ca17J3y3tFWUX3yjv3Z8Gan5JF10q3yjqFnrXFsxJFZr KFsaga45Ca4DZ37anT9S1TB71UUUUU7qnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2 9KBjDUYxBIdaVFxhVjvjDU0xZFpf9x0pEJ5rnUUUUU= X-CM-SenderInfo: pmxqt0ixw6il2tof0z/xtbC1BAZymqBx7DKAAAA3B HWSPNLCK_TIMEOUT is passed to hwspin_lock_timeout_in_atomic(), whose timeout argument is in milliseconds, not microseconds: atomic_delay += HWSPINLOCK_RETRY_DELAY_US; if (atomic_delay > to * 1000) return -ETIMEDOUT; So stm32mp_exti_set_type() asks for a 1 second timeout where the comment next to the macro says it wants 1 millisecond. The semaphore is polled with udelay() from a section that holds chip_data->rlock, a raw_spinlock_t, so preemption stays disabled for the whole wait on every configuration, PREEMPT_RT included. The hwspinlock core documents this explicitly: If the mode is HWLOCK_IN_ATOMIC (called from an atomic context) the timeout is handled with busy-waiting delays, hence shall not exceed few msecs. Pass the value the comment always described. The core retries every HWSPINLOCK_RETRY_DELAY_US (100 us), so the semaphore is still polled ten times before giving up, which is far longer than any plausible hold time on the coprocessor side. A timeout is reported with pr_err() and fails the trigger type configuration, so shortening it degrades gracefully. Fixes: 5257169ade8c ("irqchip/stm32-exti: Use the hwspin_lock_timeout_in_atomic() API") Reviewed-by: Radu Rendec Signed-off-by: Ju Nan --- changelog: v2: Add Fixes tag suggested by Radu Rendec v1: https://lore.kernel.org/all/20260805032139.35420-2-junan76@163.com/ --- drivers/irqchip/irq-stm32mp-exti.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/irqchip/irq-stm32mp-exti.c b/drivers/irqchip/irq-stm32mp-exti.c index a24f4f1a4..f5f0109bf 100644 --- a/drivers/irqchip/irq-stm32mp-exti.c +++ b/drivers/irqchip/irq-stm32mp-exti.c @@ -23,7 +23,7 @@ #define IRQS_PER_BANK 32 -#define HWSPNLCK_TIMEOUT 1000 /* usec */ +#define HWSPNLCK_TIMEOUT 1 /* msec */ #define EXTI_EnCIDCFGR(n) (0x180 + (n) * 4) #define EXTI_HWCFGR1 0x3f0 -- 2.55.0