From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A1B9337E2E6 for ; Tue, 18 Aug 2026 21:50:53 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1787089855; cv=none; b=Z14gS3VZdBQAFu2ng1zLtSsFdddaL2srzD4OxaJ1Tn5pefqy7NNlLKWoGj/2urx7t+5BpOQdC1rCFjKY29q0j/KGNsOY9ENtf2vKhB2PwYphnaYXmwYpE0sIp8Yd6DdqupWRCySHWZi7YBZAK1cuK9YCCt7UARx2RIkxstTtnM4= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1787089855; c=relaxed/simple; bh=vM1lEckXpzDMDzKpUFoITsQjjvej9YM73RqUS3ThRzM=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To; b=c86Hl9YIjJdgDNP8kDBNeOn85IhivdLs4pF3QqWTE5mIXl5y2z+G9K/WzWLJY5PlUAFJWGMFjt2wwq6UCZOpVkN74QuiER778FPDs0z+/Oc22AbWZ+zCK681MhHv7NIoqaZALd/Vi0CF4d8CdAjYywXgls30ERZqkLQY5ipd8es= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=XtkqCpNA; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="XtkqCpNA" Received: by smtp.kernel.org (Postfix) with ESMTPSA id F385D1F00A3D; Tue, 18 Aug 2026 21:50:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1787089853; bh=z7SRpwND44jkkKE7JeR8nJT3Jqa/xRKwaSwS44mWxRg=; h=From:Date:Subject:References:In-Reply-To:To; b=XtkqCpNA7Fv+lqkeE43NPfS0n+fhhMNFvTrl98MQR5sou7hNnFTTAWdT+owxlkdde tDvEtKNCmVqYIjCX+itWvaQ04tsKehHik7T9W2HaAu67LgUBdo/eo6C1vL/sDMl85B zroZztgj+R4TsWqz2tpFCwAfZ09AR96vUyIXoDf+tvJsxHzg2BAWLdXQ9laibxc6ns wXdNyCLIucGHJ36ykm1tPr0p5/iwHr5Rpj99mJUh8IQw1BgKHvQt8SR0HVV6ipo1c/ plJ+E6MWGtuRzUvJXiuGcFbF9nVXx3/i++sveL8JOe/BbAZhfVuUeoJnkdl4vgfuCU TnaPtkHU1xWgA== From: Mark Brown Date: Tue, 18 Aug 2026 22:50:45 +0100 Subject: [PATCH 2/2] regmap: Test rbtree and maple caches for very high register numbers Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260818-regmap-kunit-cache-high-bit-v1-2-7e790676dea3@kernel.org> References: <20260818-regmap-kunit-cache-high-bit-v1-0-7e790676dea3@kernel.org> In-Reply-To: <20260818-regmap-kunit-cache-high-bit-v1-0-7e790676dea3@kernel.org> To: linux-kernel@vger.kernel.org, Mark Brown X-Mailer: b4 0.17-dev X-Developer-Signature: v=1; a=openpgp-sha256; l=6063; i=broonie@kernel.org; h=from:subject:message-id; bh=vM1lEckXpzDMDzKpUFoITsQjjvej9YM73RqUS3ThRzM=; b=owEBbQGS/pANAwAKASTWi3JdVIfQAcsmYgBqhNO4NdikCQ7OAyAgoLNADYWuvdIMKDz0/Wlbd gnMZVgsaAyJATMEAAEKAB0WIQSt5miqZ1cYtZ/in+ok1otyXVSH0AUCaoTTuAAKCRAk1otyXVSH 0L/EB/0fuyv55LrAs1+/5/KDWMKwP9ss4tjNQXzRjZQmqPE/sVpy1jb85nPMUIX8DOtWSwCK2CD u7KQpvC5pPgEvNT7/RWmEs64bTSaKY7dypHqJYedeJg3yFrXR+pRIafJb9ACfuHqkExiDiZLkVT xolDi6uTmZOWiZsEJqTt73NH/3u6tzOBBvdJmIgt7UJp/rDiskEG1qSi78FbkPnf5/96aGq842Y qUuNFvMkAYH2Jrt5X/rkpDhCr+hjAMKTDOo4Wih+487wa+H1dH3+Do1OyUo/mmthdCFDUVGMFau EYPYX6iJY0BiK6CvE4w1mkpgf5sL74cziP4+aydkEVdUlAhB X-Developer-Key: i=broonie@kernel.org; a=openpgp; fpr=3F2568AAC26998F9E813A1C5C3F436CA30F5D8EB We've had bugs in the cache code with handling of register numbers with the top bit set before, add some test cases for this. It's not really worth fixing up all the individual tests to support a base address, instead write a specific test that reproduces a bunch of the coverge. Run this on the rbtree and maple caches which are the only ones that can reasonably support this case. Signed-off-by: Mark Brown --- drivers/base/regmap/regmap-kunit.c | 98 ++++++++++++++++++++++++++++++++++++-- 1 file changed, 95 insertions(+), 3 deletions(-) diff --git a/drivers/base/regmap/regmap-kunit.c b/drivers/base/regmap/regmap-kunit.c index 2999d9c185d5..c78772b660d6 100644 --- a/drivers/base/regmap/regmap-kunit.c +++ b/drivers/base/regmap/regmap-kunit.c @@ -11,6 +11,8 @@ #define BLOCK_TEST_SIZE 12 +#define HIGH_BIT_REG ((UINT_MAX / 2) - 3) + KUNIT_DEFINE_ACTION_WRAPPER(regmap_exit_action, regmap_exit, struct regmap *); struct regmap_test_priv { @@ -23,6 +25,7 @@ struct regmap_test_param { enum regcache_type cache; enum regmap_endian val_endian; + unsigned int base_reg; unsigned int from_reg; bool fast_io; }; @@ -204,7 +207,8 @@ static struct regmap *gen_regmap(struct kunit *test, config->max_register += (BLOCK_TEST_SIZE * config->reg_stride); } - size = array_size(config->max_register + 1, sizeof(*buf)); + size = array_size(config->max_register - param->base_reg + 1, + sizeof(*buf)); buf = kmalloc(size, GFP_KERNEL); if (!buf) return ERR_PTR(-ENOMEM); @@ -215,6 +219,7 @@ static struct regmap *gen_regmap(struct kunit *test, if (!(*data)) goto out_free; (*data)->vals = buf; + (*data)->base_reg = param->base_reg; if (config->num_reg_defaults) { defaults = kunit_kcalloc(test, @@ -227,8 +232,8 @@ static struct regmap *gen_regmap(struct kunit *test, config->reg_defaults = defaults; for (i = 0; i < config->num_reg_defaults; i++) { - defaults[i].reg = param->from_reg + (i * config->reg_stride); - defaults[i].def = buf[param->from_reg + (i * config->reg_stride)]; + defaults[i].reg = param->from_reg - param->base_reg + (i * config->reg_stride); + defaults[i].def = buf[param->from_reg - param->base_reg + (i * config->reg_stride)]; } } @@ -1648,6 +1653,92 @@ static void cache_write_zero(struct kunit *test) KUNIT_ASSERT_FALSE(test, regcache_reg_cached(map, 1)); } +static const struct regmap_test_param high_bit_cache_types_list[] = { + { .cache = REGCACHE_RBTREE, .from_reg = HIGH_BIT_REG, + .base_reg = HIGH_BIT_REG }, + { .cache = REGCACHE_MAPLE, .from_reg = HIGH_BIT_REG, + .base_reg = HIGH_BIT_REG }, +}; + +KUNIT_ARRAY_PARAM(high_bit_cache_types, high_bit_cache_types_list, param_to_desc); + +/* + * Dynamically allocated cache types should support registers with the + * high bit set, the backend will return an error for any operation on + * a register below the expected window. + */ +static void cache_high_bit_reg(struct kunit *test) +{ + const struct regmap_test_param *param = test->param_value; + struct regmap_ram_data *data; + struct regmap_config config; + struct regmap *map; + unsigned int val[BLOCK_TEST_SIZE], rval; + int i; + + config = test_regmap_config; + + map = gen_regmap(test, &config, &data); + KUNIT_ASSERT_FALSE(test, IS_ERR(map)); + if (IS_ERR(map)) + return; + + get_random_bytes(&val, sizeof(val)); + + /* No defaults so no registers cached */ + for (i = 0; i < BLOCK_TEST_SIZE; i++) + KUNIT_EXPECT_FALSE(test, regcache_reg_cached(map, param->from_reg + i)); + + /* Writes should reach the device */ + for (i = 0; i < BLOCK_TEST_SIZE; i++) + KUNIT_EXPECT_EQ(test, 0, regmap_write(map, param->from_reg + i, + val[i])); + for (i = 0; i < BLOCK_TEST_SIZE; i++) { + KUNIT_EXPECT_TRUE(test, data->written[i]); + KUNIT_EXPECT_EQ(test, val[i], data->vals[i]); + } + + /* Reads should be satisfied from the cache */ + for (i = 0; i < BLOCK_TEST_SIZE; i++) { + KUNIT_EXPECT_TRUE(test, regcache_reg_cached(map, param->from_reg + i)); + KUNIT_EXPECT_EQ(test, 0, regmap_read(map, param->from_reg + i, + &rval)); + KUNIT_EXPECT_EQ(test, val[i], rval); + KUNIT_EXPECT_FALSE(test, data->read[i]); + } + + /* Trash the data on the device then resync */ + regcache_mark_dirty(map); + for (i = 0; i < BLOCK_TEST_SIZE; i++) { + data->vals[i] = 0; + data->written[i] = false; + } + KUNIT_EXPECT_EQ(test, 0, regcache_sync(map)); + + /* Did we just write the correct data out? */ + for (i = 0; i < BLOCK_TEST_SIZE; i++) { + KUNIT_EXPECT_TRUE(test, data->written[i]); + KUNIT_EXPECT_EQ(test, val[i], data->vals[i]); + } + + /* Drop some registers */ + KUNIT_EXPECT_EQ(test, 0, regcache_drop_region(map, param->from_reg + 3, + param->from_reg + 5)); + for (i = 0; i < BLOCK_TEST_SIZE; i++) + KUNIT_EXPECT_EQ(test, i < 3 || i > 5, + regcache_reg_cached(map, param->from_reg + i)); + + /* Reread and check only the dropped registers hit the device */ + for (i = 0; i < BLOCK_TEST_SIZE; i++) + data->read[i] = false; + for (i = 0; i < BLOCK_TEST_SIZE; i++) { + KUNIT_EXPECT_EQ(test, 0, regmap_read(map, param->from_reg + i, + &rval)); + KUNIT_EXPECT_EQ(test, val[i], rval); + KUNIT_EXPECT_EQ(test, i >= 3 && i <= 5, data->read[i]); + } +} + /* Check that caching the window register works with sync */ static void cache_range_window_reg(struct kunit *test) { @@ -2168,6 +2259,7 @@ static struct kunit_case regmap_test_cases[] = { KUNIT_CASE_PARAM(cache_drop_all_and_sync_has_defaults, sparse_cache_types_gen_params), KUNIT_CASE_PARAM(cache_present, sparse_cache_types_gen_params), KUNIT_CASE_PARAM(cache_write_zero, sparse_cache_types_gen_params), + KUNIT_CASE_PARAM(cache_high_bit_reg, high_bit_cache_types_gen_params), KUNIT_CASE_PARAM(cache_range_window_reg, real_cache_types_only_gen_params), KUNIT_CASE_PARAM(raw_read_defaults_single, raw_test_types_gen_params), -- 2.47.3