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[159.2.239.150]) by smtp.gmail.com with ESMTPSA id af79cd13be357-937033cd8a7sm297845385a.28.2026.08.18.07.03.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 18 Aug 2026 07:03:05 -0700 (PDT) Received: from jgg by wakko with local (Exim 4.97) (envelope-from ) id 1wwKPA-0000000041s-172T; Tue, 18 Aug 2026 11:03:04 -0300 Date: Tue, 18 Aug 2026 11:03:04 -0300 From: Jason Gunthorpe To: "Tian, Kevin" Cc: Alex Williamson , Samiullah Khawaja , kvm , Alex Williamson , Bjorn Helgaas , linux-kernel , linux-pci Subject: Re: [RFC PATCH 1/5] PCI: Refuse function reset of an SR-IOV PF with enabled VFs Message-ID: <20260818140304.GC5482@ziepe.ca> References: <20260812045325.2733631-1-alex.williamson@nvidia.com> <20260812045325.2733631-2-alex.williamson@nvidia.com> <20260814083737.66bb83fb@nvidia.com> <20260817121810.GC933791@ziepe.ca> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: On Tue, Aug 18, 2026 at 07:07:20AM +0000, Tian, Kevin wrote: > 3) resetting a PF due to ad-hoc FW error > > e.g. pdsc_check_pci_health() calls pci_reset_function() when FW > reports broken PCI. Sounds a similar condition to AER. > > but as it calls pci_reset_function() this series causes a regression > in case of active VFs. Is it desired? mlx5 does something similar. RAS flows require detecting the PF has blown up and resetting it to bring it back. This has to work while VFs exist and bound to kernel drivers or vfio. In the VFIO KVM case I would expect the VM to experiance a RAS error on its vPCI device and trigger a VF flr But we have to sort all this out through the hypervisor to not crash the machine or otherwise :) Jason