From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-m49221.qiye.163.com (mail-m49221.qiye.163.com [45.254.49.221]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4FFA436DA18 for ; Wed, 19 Aug 2026 11:00:14 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=45.254.49.221 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1787137223; cv=none; b=OhEwhgAW6NYHDyW5iWvROdUrwm8p/Fe7D8S4KOCz0qbvXpAXtBxRT8swGm9XwvEHJG0u7jXwyqQnpFYmyEmlLZWt95M9fRnLNdHT4v7KxOd+CoyxpplBfdtxqZ1MqW5mUIG1JD6LpkKIiYK+x4Yuo65MWCRg5kAI15d7vlrZPEI= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1787137223; c=relaxed/simple; bh=KeHlsMYiaX2IQCyF8I05CCTHyiOiXYRY9tWSiuMun4s=; h=From:To:Cc:Subject:Date:Message-ID:MIME-Version; b=lOYvob6J6979fpEySMOi9sGBRDp8CTHA8cygj0EQydTXw6XYfo8xItEnHTQBxWnad+mYWNGLxI75U/n1i2gR86F1hL4rKo+ZKXpvoqldVR3yRNvK+2zVVlzYWIombf4rXyu+fHvxlJ74QaBU6U7fN1bwE9L68bJYLXXp4tF2W+A= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=hj-micro.com; spf=pass smtp.mailfrom=hj-micro.com; dkim=pass (1024-bit key) header.d=hj-micro.com header.i=@hj-micro.com header.b=cP82gNpU; arc=none smtp.client-ip=45.254.49.221 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=hj-micro.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=hj-micro.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=hj-micro.com header.i=@hj-micro.com header.b="cP82gNpU" Received: from localhost.localdomain (unknown [122.224.147.158]) by smtp.qiye.163.com (Hmail) with ESMTP id 4a8ff1e52; Wed, 19 Aug 2026 18:54:56 +0800 (GMT+08:00) From: Shouping Wang To: will@kernel.org, robin.murphy@arm.com Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, mark.rutland@arm.com, peter.du@hj-micro.com, andy.xu@hj-micro.com, allen.wang@hj-micro.com Subject: [PATCH] perf/arm-cmn: Fix {wp_dev_sel2, wp_dev_sel} limited to 0/1 when MXP_MULTIPLE_DTM_EN is TRUE Date: Wed, 19 Aug 2026 18:54:43 +0800 Message-ID: <20260819105443.668784-1-allen.wang@hj-micro.com> X-Mailer: git-send-email 2.43.0 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-HM-Tid: 0aa019a8ee1e09d8kunmc5bd91ee17deb6 X-HM-MType: 1 X-HM-Spam-Status: e1kfGhgUHx5ZQUpXWQgPGg8OCBgUHx5ZQUlOS1dZFg8aDwILHllBWSg2Ly tZV1koWUFITzdXWRgWCB1ZQUpXWS1ZQUlXWQ8JGhUIEh9ZQVlDGUIYVhoYS0IeQkJJSE9LGFYVFA kWGhdVEwETFhoSFyQUDg9ZV1kYEgtZQVlKSUlVSUlPVUpPTFVKTkNZV1kWGg8SFR0UWUFZT0tIVU pLSU9PT0hVSktLVUpCS0tZBg++ DKIM-Signature: a=rsa-sha256; b=cP82gNpUdVxwehtiohki+VsHpHr6hsZKe0W9I+ovXh975iifoKxStVJZuvPQu+91Dxdw0F/9rEpRhtnxLAQaoKBm99VCIG4qTvJUH5pEg+9nAE62op0WOWb5Eo9KGWpbx5wozkoU+siYtOuJlZKlWJEXzM9PMo1H+WbK11cK7ns=; c=relaxed/relaxed; s=default; d=hj-micro.com; v=1; bh=iSsTtarhuQa/+w5hFVU5E7D0K2j1DMzYFWHnF5TkviI=; h=date:mime-version:subject:message-id:from; When MXP_MULTIPLE_DTM_EN is TRUE, each DTM will monitor at most two device ports. In this case, {wp_dev_sel2, wp_dev_sel} will only use values 2'b00 and 2'b01 per DTM. Previously the setting allowed values beyond the supported range per DTM, which could cause each DTM to select invalid ports when MXP_MULTIPLE_DTM_EN is TRUE. Fix this by applying `dev %= 2` to clamp the selection value to the valid range when MXP_MULTIPLE_DTM_EN is TRUE. Fixes: 60d1504070c2 ("perf/arm-cmn: Support new IP features") Signed-off-by: Shouping Wang --- drivers/perf/arm-cmn.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/perf/arm-cmn.c b/drivers/perf/arm-cmn.c index 40c05c519a1d..13ccbf2a7345 100644 --- a/drivers/perf/arm-cmn.c +++ b/drivers/perf/arm-cmn.c @@ -1392,6 +1392,7 @@ static void arm_cmn_claim_wp_idx(struct arm_cmn_dtm *dtm, static u32 arm_cmn_wp_config(struct perf_event *event, int wp_idx) { + struct arm_cmn *cmn = to_cmn(event->pmu); u32 config; u32 dev = CMN_EVENT_WP_DEV_SEL(event); u32 chn = CMN_EVENT_WP_CHN_SEL(event); @@ -1404,6 +1405,9 @@ static u32 arm_cmn_wp_config(struct perf_event *event, int wp_idx) if (is_cmn600) grp &= 1; + if (cmn->multi_dtm) + dev %= 2; + config = FIELD_PREP(CMN_DTM_WPn_CONFIG_WP_DEV_SEL, dev) | FIELD_PREP(CMN_DTM_WPn_CONFIG_WP_CHN_SEL, chn) | FIELD_PREP(CMN_DTM_WPn_CONFIG_WP_GRP, grp) | -- 2.43.0