From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 417E7476CDC; Thu, 20 Aug 2026 14:24:46 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1787235889; cv=none; b=IVUcioqiHx1lyRRjabF4oC8HxIe/o0XLgCXh8q2bTfpAHBrxwfgAnYRjEZytEAJE3G77CiWvxyyfbttgNBgWPX8NEcyCUrZvOUcs8KrgNkbpXwmXDmQUCrPWCPlaHK11PojdHnayQ9lwk0DrHGgfPFgTo9gzHHzkj/f/qAYQb4A= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1787235889; c=relaxed/simple; bh=AufvicVxdUHfJgRu2AIkETGMHE+WyIlTQyE3yBYUC60=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=nlf//atG6gZVI+RlBOK0FN1+fE8gN3Wl92eTWfLdTd8ciLVgYXz+5ySYtr8h08BavvCXnhe4qHceLl2RvX7+7k46UYGECFMRwzu4p0Wh6Nb/GUaF01oqEXp8lxeglAtywg/aXCxbI6R+myR+Y03o0swiZ36TVTp+sb6s9eOiATM= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=BsT75KT3; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="BsT75KT3" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 7B5BD1F00A3A; Thu, 20 Aug 2026 14:24:42 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1787235886; bh=xKYz+iyUJ7D8aXLCEzfJSofxHvev8MRiekI3GPvcDKE=; h=From:Date:Subject:References:In-Reply-To:To:Cc; b=BsT75KT3yAbuOFRT07b9yh14rMq66QQt2QPH4ohDl41LGwV3yzqhhZ7WWeHmmY4Q4 +3BN1As6A6EQC9tdXGsEqfSENOja1WbJ5uobg6KlsfldKNXeLEMbScJr2CTstRvZPN Ed7Sk+Tc/Cwceh/PN0JxXrduzy63rhg/3vQH/Zk6lCUK/ouI0qb6DvK+Ta+lUO0BMu QY3DAFlcta50eNifGXpniDHYTwn/MchhnZt2ZDFr6oV5H1ZaU9eNqhQ2wChD8kzC03 ij2zRcw+uFGVYXm+tWTTKkQvtQWPfNe/R0RgDCyz+wrbdbAB6G1xzkWn+75Evl0/VO dYac+KBRanT+g== From: Konrad Dybcio Date: Thu, 20 Aug 2026 16:24:14 +0200 Subject: [PATCH v4 5/5] arm64: dts: qcom: hamoa: Extend QMPPHY description for USB4 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260820-topic-usb4phy-v4-5-aec9d2cb31f6@oss.qualcomm.com> References: <20260820-topic-usb4phy-v4-0-aec9d2cb31f6@oss.qualcomm.com> In-Reply-To: <20260820-topic-usb4phy-v4-0-aec9d2cb31f6@oss.qualcomm.com> To: Vinod Koul , Neil Armstrong , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Konrad Dybcio , Manivannan Sadhasivam Cc: linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, usb4-upstream@oss.qualcomm.com, Raghavendra Thoorpu , Mika Westerberg , Sven Peter , Konrad Dybcio , Dmitry Baryshkov , Abel Vesa X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1787235854; l=2242; i=konrad.dybcio@oss.qualcomm.com; s=20230215; h=from:subject:message-id; bh=1Y4QL2IvKdhr8co3E6ksVFTcg4K1mp07QkMtVRBoBxw=; b=XvRFlREVvYzX0XCiJOxDvZZRPQcU54jNk28jx5xbH2GtZjNmAR97vddjhiIVbtx5l6cXDTV1O PzkMbjOuyV4B1SMwcGFhqtp+01eUoJ0UZlwLFJg2NgIL3H/O2h6ACuz X-Developer-Key: i=konrad.dybcio@oss.qualcomm.com; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= From: Konrad Dybcio The USB4 part of the QMPPHY requires that one more GCC clock (P2RR2P - PHY-to-Router, Router-to-PHY) is enabled for the PHY to initialize successfully. Describe that. Reviewed-by: Dmitry Baryshkov Reviewed-by: Abel Vesa Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/hamoa.dtsi | 18 ++++++++++++------ 1 file changed, 12 insertions(+), 6 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/hamoa.dtsi b/arch/arm64/boot/dts/qcom/hamoa.dtsi index 8a96ea1bdb9c..17a7fbaaedc0 100644 --- a/arch/arm64/boot/dts/qcom/hamoa.dtsi +++ b/arch/arm64/boot/dts/qcom/hamoa.dtsi @@ -2833,11 +2833,13 @@ usb_1_ss0_qmpphy: phy@fd5000 { clocks = <&gcc GCC_USB3_PRIM_PHY_AUX_CLK>, <&rpmhcc RPMH_CXO_CLK>, <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>, - <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>; + <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>, + <&gcc GCC_USB4_0_PHY_P2RR2P_PIPE_CLK>; clock-names = "aux", "ref", "com_aux", - "usb3_pipe"; + "usb3_pipe", + "p2rr2p_pipe"; power-domains = <&gcc GCC_USB_0_PHY_GDSC>; @@ -2904,11 +2906,13 @@ usb_1_ss1_qmpphy: phy@fda000 { clocks = <&gcc GCC_USB3_SEC_PHY_AUX_CLK>, <&tcsr TCSR_USB4_1_CLKREF_EN>, <&gcc GCC_USB3_SEC_PHY_COM_AUX_CLK>, - <&gcc GCC_USB3_SEC_PHY_PIPE_CLK>; + <&gcc GCC_USB3_SEC_PHY_PIPE_CLK>, + <&gcc GCC_USB4_1_PHY_P2RR2P_PIPE_CLK>; clock-names = "aux", "ref", "com_aux", - "usb3_pipe"; + "usb3_pipe", + "p2rr2p_pipe"; power-domains = <&gcc GCC_USB_1_PHY_GDSC>; @@ -2975,11 +2979,13 @@ usb_1_ss2_qmpphy: phy@fdf000 { clocks = <&gcc GCC_USB3_TERT_PHY_AUX_CLK>, <&tcsr TCSR_USB4_2_CLKREF_EN>, <&gcc GCC_USB3_TERT_PHY_COM_AUX_CLK>, - <&gcc GCC_USB3_TERT_PHY_PIPE_CLK>; + <&gcc GCC_USB3_TERT_PHY_PIPE_CLK>, + <&gcc GCC_USB4_2_PHY_P2RR2P_PIPE_CLK>; clock-names = "aux", "ref", "com_aux", - "usb3_pipe"; + "usb3_pipe", + "p2rr2p_pipe"; power-domains = <&gcc GCC_USB_2_PHY_GDSC>; -- 2.55.0