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Thu, 20 Aug 2026 04:12:30 -0700 Date: Thu, 20 Aug 2026 14:12:27 +0300 From: Zhi Wang To: John Hubbard CC: Danilo Krummrich , Alexandre Courbot , Timur Tabi , Alistair Popple , Eliot Courtney , David Airlie , Simona Vetter , Bjorn Helgaas , Miguel Ojeda , Alex Gaynor , Boqun Feng , Gary Guo , =?UTF-8?B?QmrDtnJu?= Roy Baron , Benno Lossin , "Andreas Hindborg" , Alice Ryhl , "Trevor Gross" , , LKML Subject: Re: [PATCH 15/27] gpu: nova-core: add GMC send path Message-ID: <20260820141227.1376e13b@inno-dell> In-Reply-To: <20260819035221.336390-16-jhubbard@nvidia.com> References: <20260819035221.336390-1-jhubbard@nvidia.com> <20260819035221.336390-16-jhubbard@nvidia.com> X-Mailer: Claws Mail 4.3.1 (GTK 3.24.52; x86_64-pc-linux-gnu) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="US-ASCII" Content-Transfer-Encoding: 7bit X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN2PEPF000044AC:EE_|CH3PR12MB8233:EE_ X-MS-Office365-Filtering-Correlation-Id: afcf5047-0224-400a-c658-08defeabf91f X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|1800799024|376014|7416014|23010399003|36860700016|18002099003|3023799007|22082099003|56012099006|6133799003|11063799006|4143699003|10067099003; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: KHlTE9CUnQ9j7CmppZgiMVQNpCpPFnu0/zMyxvN1GxrCSK1Be12fkuqXnAJ03zXmqDWRlXxkqWeAoi3vFzno5dDIFvL7iTzxnjJnHAd8yyH/W0r1EERs/YQbu7TmnofQxj6gXG33xW8X4Lz2domfbkYZVmQSMuPKtFtEdpBlKkCBcUqFsvJonEMV3qHkU42enjR9dm+PUdJ9DmQcN4Foo9etneqdqqg6jHz3eTRQFTRfMJLzZ0gtIYJf6tbxTcLxPKAkDhrVUrDjd/JLdTKHTJZ9IlsGDeRvvb+VsUZSzgT+GFXgQj2TBA6SdCHBuLFiVxgqVztS4K9tcgeoNFrNrYcopIuAX8mdWbNJatbsS5bSq0sb41YBHFcMzpfxnVuqTiN4pXOcMnuw5fFkx0s+4FhJkfEhyXvNlUlFgGN70g1QNvcVc1KEgPhvNbFcnih4 X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 20 Aug 2026 11:12:50.3802 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: afcf5047-0224-400a-c658-08defeabf91f X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.161];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BN2PEPF000044AC.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH3PR12MB8233 On Tue, 18 Aug 2026 20:52:08 -0700 John Hubbard wrote: Looking good to me. Reviewed-by: Zhi Wang > The r000 GSP-RM boot protocol requires the driver to send GSP_INIT as > a GMC command. GMC and RPC commands share the command queue and > sequence counter. GMC queue elements carry a GMC API header and no > checksum. > > Add the GMC send path needed for GSP_INIT. > > Assisted-by: Cursor:claude-opus-5 > Signed-off-by: John Hubbard > --- > drivers/gpu/nova-core/gsp/cmdq.rs | 59 > +++++++++++++++++++++++++++++++ drivers/gpu/nova-core/gsp/fw.rs | > 1 - 2 files changed, 59 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/nova-core/gsp/cmdq.rs > b/drivers/gpu/nova-core/gsp/cmdq.rs index 0dab3d279426..88b143c6a7b7 > 100644 --- a/drivers/gpu/nova-core/gsp/cmdq.rs > +++ b/drivers/gpu/nova-core/gsp/cmdq.rs > @@ -52,6 +52,7 @@ > driver::Bar0, > gsp::{ > fw::{ > + GspGmcMsgElement, > GspMsgElement, > MsgFunction, > MsgqRxHeader, > @@ -963,6 +964,64 @@ fn send_command(&mut self, bar: Bar0<'_>, > command: M) -> Result Ok(rpc_seq) > } > > + /// Sends a GMC API command to the GSP. > + /// > + /// `command_id` is the GMC command identifier (from > `GMCAPI_COMMANDS`). > + /// `payload` is the command-specific data following the > [`super::fw::GmcApiHeader`]. > + /// `max_response_size` is the maximum expected response payload > size. > + /// > + /// The command carries the next RPC sequence number, which the > GSP echoes in its response. > + /// The number is consumed whether or not the send succeeds. > + /// > + /// # Errors > + /// > + /// - `EMSGSIZE` if the command exceeds the maximum queue > element size. > + /// - `ETIMEDOUT` if space does not become available within the > timeout. > + /// - `EIO` if the command header is not properly aligned. > + #[expect(dead_code)] > + fn send_gmc( > + &mut self, > + bar: Bar0<'_>, > + command_id: u32, > + payload: &[u8], > + max_response_size: u32, > + ) -> Result { > + let rpc_seq = self.rpc_seq; > + self.rpc_seq = self.rpc_seq.wrapping_add(1); > + > + let dst = self > + .gsp_mem > + .allocate_command::(payload.len(), > Self::ALLOCATE_TIMEOUT)?; + > + let msg_element = GspGmcMsgElement::init( > + command_id, > + u64::from(rpc_seq), > + payload.len(), > + max_response_size, > + ); > + // SAFETY: `dst.header` points to a valid, writable > `GspGmcMsgElement` region. > + unsafe { > + msg_element.__init(core::ptr::from_mut(dst.header))?; > + } > + > + SBufferIter::new_writer([&mut dst.contents.0[..], &mut > dst.contents.1[..]]) > + .write_all(payload)?; > + > + dev_dbg!( > + &self.dev, > + "GSP GMC: send: seq# {}, command_id=0x{:x}, > length=0x{:x}\n", > + rpc_seq, > + command_id, > + dst.header.length(), > + ); > + > + let elem_count = dst.header.element_count(); > + self.gsp_mem.advance_cpu_write_ptr(elem_count); > + Cmdq::notify_gsp(bar); > + > + Ok(()) > + } > + > /// Wait for a message to become available on the message queue. > /// > /// This works purely at the transport layer and does not > interpret or validate the message diff --git > a/drivers/gpu/nova-core/gsp/fw.rs b/drivers/gpu/nova-core/gsp/fw.rs > index 050a6af8c0c7..56f255a3d49c 100644 --- > a/drivers/gpu/nova-core/gsp/fw.rs +++ > b/drivers/gpu/nova-core/gsp/fw.rs @@ -1016,7 +1016,6 @@ pub(crate) > struct GspGmcMsgElement { == > core::mem::offset_of!(r000_00::GSP_MSG_QUEUE_ELEMENT, nvdmHeader) ); > > -#[expect(dead_code)] > impl GspGmcMsgElement { > /// Creates a new GMC message element. > ///