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[103.229.18.19]) by smtp.gmail.com with ESMTPSA id 5614622812f47-4b2d6d34c8esm4804321b6e.13.2026.08.21.09.09.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 21 Aug 2026 09:09:10 -0700 (PDT) From: Hardeep Sharma Subject: [PATCH v3 00/15] Add initial support for Qualcomm Kuno SoC Date: Fri, 21 Aug 2026 21:38:53 +0530 Message-Id: <20260821-kuno-soc-support-v3-0-196e2b306368@oss.qualcomm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit X-B4-Tracking: v=1; b=H4sIABV4iGoC/33NQQ6CMBAF0KuYri0ZClJw5T2MCyhTqQrFDhAN4 e62uHFB3Ezykz/vz4zQGSR23M3M4WTI2M6HZL9jqim7K3JT+8wEiAxyKPh97CwnqziNfW/dwOO 6rHKR1QiVZv6td6jNayXPl2+msbqhGoITGo2hwbr3ujnFofeHn2IO/ICANaYlKClOlih6juVD2 baN/GFhZRI/TpxuOMI7CchCFqkGLZMNZ1mWD53Xd1URAQAA X-Change-ID: 20260809-kuno-soc-support-1dab826de0bf To: Bjorn Andersson , Konrad Dybcio , Krzysztof Kozlowski , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Ulf Hansson , Michael Turquette , Stephen Boyd , Brian Masney , Taniya Das , Georgi Djakov , Bartosz Golaszewski , Linus Walleij , Thomas Gleixner , Radu Rendec , Robert Marko , Guru Das Srinagesh Cc: linux-arm-msm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-pm@vger.kernel.org, linux-clk@vger.kernel.org, linux-gpio@vger.kernel.org, Hardeep Sharma , Mukesh Savaliya , Konrad Dybcio , Dmitry Baryshkov , Bartosz Golaszewski X-Mailer: b4 0.15-dev-47773 X-Developer-Signature: v=1; a=ed25519-sha256; t=1787328540; l=6010; i=hardeep.sharma@oss.qualcomm.com; s=20260204; h=from:subject:message-id; bh=jxLA9VmqlASnr9fzzhm9WsTas9antlNxLiShCgjTI60=; b=MDYrLP7FcQ+j9/6vo1UFppH0IwWdS86/8og5HAAgIs471fU06m2GCKJ4hbqwj3pUYTH0IYKP5 Eyv8HwzJtLKCk7AXx93uQ9sX7aXIV7h8HAYjrLM+2imb4FkDcnRF8Cd X-Developer-Key: i=hardeep.sharma@oss.qualcomm.com; a=ed25519; pk=IvwPDKA2xr6jWaCIBBY2ran/H0124QUzVfun+CtEikM= X-Authority-Analysis: v=2.4 cv=BcroFLt2 c=1 sm=1 tr=0 ts=6a887828 cx=c_pps a=yymyAM/LQ7lj/HqAiIiKTw==:117 a=Ou0eQOY4+eZoSc0qltEV5Q==:17 a=IkcTkHD0fZMA:10 a=Sv0fKeRqtYgA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=DJpcGTmdVt4CTyJn9g5Z:22 a=VwQbUJbxAAAA:8 a=EUspDBNiAAAA:8 a=wcjD13wQ9fZUy7fWwpUA:9 a=QEXdDO2ut3YA:10 a=O8hF6Hzn-FEA:10 a=efpaJB4zofY2dbm2aIRb:22 X-Proofpoint-GUID: d_HsC0MxRK13moq0gCT0AkU3Rji50INV X-Proofpoint-ORIG-GUID: d_HsC0MxRK13moq0gCT0AkU3Rji50INV X-Proofpoint-Spam-Info: AW1haW4tMjYwODIxMDEyNiBTYWx0ZWRfX81SDzWhCLHge DBTmKuyX9XB/9I4J1U233J/XIeyUc4GiEO8FS4mxKX1iYLp4eKMF/E5kNU5WiS5+16exMTt/LEY 6TWblEzpQqRNPRWO1uctIiZ7B/PKPFE= X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwODIxMDEyNiBTYWx0ZWRfX4o/qhspkd/ut RBCBHlTtH6MbI0C6afrGMgBPWwKQp/MlqgT/87UeZzm1TXy6Ktf+RmQithHcHqyMeJcYBCN6BcC yC8jWlYyBe3x1oQiAOB4t2ycP5rE2v+G6yKO7IIimY2OF2DLUeuncRckkC9Ec/lhe2WRpk0bxXK YDoAU2rwWG5o2uf/giiOLYz+h6rZC6WIG+aJ8H5f+undUxbVwZL7n+Ti+odhxpmFtq1AcxdRYsQ YQRfwnUYjGc3MrkQnS5dK38Cv0lw9fAO6CrAj8F1WhvnkuGw8f2hxRi7I2egAp15eV5EPjpW/Kg f40pObf5BSa7zYORhHhjef+IeGq5EnwuzcCHn3dL1zPTISt1ROvFyAsgrtAapZMb9W1pnCUOa+c krVl4x8MsQtLbeH9VeoiDONKFondATQs7nZ4Bk+n3bpuK4MhQvhajPf/o9LbkTXkyLMsys2Uaz3 5+julZePPechjR4GkmQ== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-08-21_05,2026-08-21_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 impostorscore=0 phishscore=0 malwarescore=0 suspectscore=0 priorityscore=1501 bulkscore=0 clxscore=1015 adultscore=0 lowpriorityscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2608210126 This series adds initial support for the Qualcomm Kuno SoC and the Kuno IDP reference board. Kuno is a 32-bit ARM (Cortex-A7) Qualcomm platform. This series brings up the essential SoC infrastructure required to boot to a serial console: - Global Clock Controller (GCC) and RPMh clock controller - RPMh power domains - Interconnect (NoC) provider - TLMM pin controller - PDC interrupt controller and SCM firmware interface - Devicetree for the SoC and the Kuno IDP board The soc: qcom: geni-se patch allows the GENI serial engine driver to be selected on 32-bit ARM Qualcomm SoCs, which the debug UART console depends on. Signed-off-by: Hardeep Sharma --- Changes in v3: - Addressed v2 review feedback: - Reworked the interconnect binding clocks: dropped clock-names and replaced the flexible min/maxItems list with fixed per-compatible clocks (aggre-noc: 2, system-noc: 1), required where present and disallowed otherwise, matching the sdx75/glymur shape. - Made #power-domain-cells required on the Kuno GCC binding and declared it on the SoC gcc node, since the Kuno GCC hosts GDSCs and is a power-domain provider (following qcom,sdx75-gcc); the driver's GDSC support will follow separately. - Made the GPIO65/66 QDSS CTI trig1 funcsel-3 route selectable: added a distinct qdss_cti_trig1_mire pin function (and allowed it in the TLMM binding enum), as the duplicate funcsel-2/3 entry left funcsel-3 unreachable. - Collected Acked-by / Reviewed-by tags from v2. - Link to v2: https://lore.kernel.org/all/20260814-kuno-soc-support-v2-0-3079794f0f73@oss.qualcomm.com/ Changes in v2: - Addressed v1 review feedback: - Reworked soc: qcom: geni-se commit message; dropped the Fixes: tag. - Reworded dt-bindings commit messages to the "Document X for the Qualcomm Kuno SoC" one-liner form. - Canonicalized copyright headers on interconnect binding / driver / NoC ID header to the single-line Qualcomm Technologies form. - Dropped unused from the interconnect driver. - Fixed MODULE_DESCRIPTION casing "KUNO" -> "Kuno" in the interconnect driver. - Extended interconnect binding to optionally allow up to four QoS AHB clocks (matches sdx75/glymur shape). - Cleaned up brace/space style in gcc-kuno.c to match peer clock drivers. - Reworked initial DTS: moved idle-states / domain-idle-states inside cpus{}, wrapped fixed clocks in a clocks{} container with peer node names (xo-board, sleep-clk), dropped the pcie_pipe_clk fixed-clock stub (the GCC 4th clock now uses <0> in DTS to match the sdx75 idiom; the YAML example uses a named placeholder), dropped the RPMHPD_CX power-domain reference on GCC (Kuno GCC has no GDSCs / no corner votes / no pm_runtime, so the reference was inert), and added a bootloader hand-off comment on the memory node. - Collected Acked-by / Reviewed-by tags from v1. - Link to v1: https://lore.kernel.org/all/20260809-kuno-soc-support-v1-0-5e0ede4a0c72@oss.qualcomm.com/ --- Hardeep Sharma (15): soc: qcom: geni-se: allow selection on 32-bit ARM Qualcomm SoCs dt-bindings: power: rpmpd: Document Kuno RPMh power domains pmdomain: qcom: rpmhpd: Add power domains for Kuno dt-bindings: clock: qcom,rpmhcc: Add Kuno RPMh clock controller clk: qcom: clk-rpmh: Add support for Kuno RPMh clocks dt-bindings: interconnect: Add Qualcomm Kuno NoC interconnect: qcom: Add Kuno interconnect provider driver dt-bindings: pinctrl: qcom: Add Kuno TLMM pinctrl: qcom: Add Kuno pinctrl driver dt-bindings: clock: qcom: Add Kuno Global Clock Controller clk: qcom: Add Global Clock Controller driver for Kuno dt-bindings: interrupt-controller: qcom,pdc: Add Kuno compatible string dt-bindings: firmware: qcom,scm: Document SCM on Kuno SoC dt-bindings: arm: qcom: Document Kuno IDP board ARM: dts: qcom: Add initial device tree for Kuno SoC .../devicetree/bindings/arm/qcom-soc.yaml | 4 +- Documentation/devicetree/bindings/arm/qcom.yaml | 5 + .../devicetree/bindings/clock/qcom,kuno-gcc.yaml | 52 + .../devicetree/bindings/clock/qcom,rpmhcc.yaml | 1 + .../devicetree/bindings/firmware/qcom,scm.yaml | 1 + .../bindings/interconnect/qcom,kuno-rpmh.yaml | 117 ++ .../bindings/interrupt-controller/qcom,pdc.yaml | 1 + .../bindings/pinctrl/qcom,kuno-tlmm.yaml | 110 ++ .../devicetree/bindings/power/qcom,rpmpd.yaml | 1 + arch/arm/boot/dts/qcom/Makefile | 1 + arch/arm/boot/dts/qcom/qcom-kuno-idp.dts | 25 + arch/arm/boot/dts/qcom/qcom-kuno.dtsi | 422 ++++++ drivers/clk/qcom/Kconfig | 10 + drivers/clk/qcom/Makefile | 1 + drivers/clk/qcom/clk-rpmh.c | 15 + drivers/clk/qcom/gcc-kuno.c | 1438 ++++++++++++++++++++ drivers/interconnect/qcom/Kconfig | 13 + drivers/interconnect/qcom/Makefile | 2 + drivers/interconnect/qcom/kuno.c | 977 +++++++++++++ drivers/pinctrl/qcom/Kconfig.msm | 11 + drivers/pinctrl/qcom/Makefile | 1 + drivers/pinctrl/qcom/pinctrl-kuno.c | 801 +++++++++++ drivers/pmdomain/qcom/rpmhpd.c | 16 + drivers/soc/qcom/Kconfig | 1 - include/dt-bindings/clock/qcom,kuno-gcc.h | 95 ++ include/dt-bindings/interconnect/qcom,kuno.h | 89 ++ 26 files changed, 4207 insertions(+), 3 deletions(-) --- base-commit: 28d012efb4327f9c75d5e042a7c91e9a542efa98 change-id: 20260809-kuno-soc-support-1dab826de0bf Best regards, -- Hardeep Sharma