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[103.229.18.19]) by smtp.gmail.com with ESMTPSA id 5614622812f47-4b2d6d34c8esm4804321b6e.13.2026.08.21.09.09.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 21 Aug 2026 09:09:57 -0700 (PDT) From: Hardeep Sharma Date: Fri, 21 Aug 2026 21:38:58 +0530 Subject: [PATCH v3 05/15] clk: qcom: clk-rpmh: Add support for Kuno RPMh clocks Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260821-kuno-soc-support-v3-5-196e2b306368@oss.qualcomm.com> References: <20260821-kuno-soc-support-v3-0-196e2b306368@oss.qualcomm.com> In-Reply-To: <20260821-kuno-soc-support-v3-0-196e2b306368@oss.qualcomm.com> To: Bjorn Andersson , Konrad Dybcio , Krzysztof Kozlowski , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Ulf Hansson , Michael Turquette , Stephen Boyd , Brian Masney , Taniya Das , Georgi Djakov , Bartosz Golaszewski , Linus Walleij , Thomas Gleixner , Radu Rendec , Robert Marko , Guru Das Srinagesh Cc: linux-arm-msm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-pm@vger.kernel.org, linux-clk@vger.kernel.org, linux-gpio@vger.kernel.org, Hardeep Sharma , Dmitry Baryshkov , Konrad Dybcio X-Mailer: b4 0.15-dev-47773 X-Developer-Signature: v=1; a=ed25519-sha256; t=1787328540; l=2081; i=hardeep.sharma@oss.qualcomm.com; s=20260204; h=from:subject:message-id; bh=IARJjUuJ8TzYCPtgJnhyF2BzcDD2X/PGevklk7LPqgQ=; b=KmDwPQXORl1Ra/lOX6PTLp4448/qlVRagyslHmyTMRKAmZ2TjRjYeGXCKrSJhH8L1o0oYoqcg mL+qVKKxt5UCvGeiVmeELj3lxlLw3pxFMOsKUgQ94CFkDvv8sp0mfH7 X-Developer-Key: i=hardeep.sharma@oss.qualcomm.com; a=ed25519; pk=IvwPDKA2xr6jWaCIBBY2ran/H0124QUzVfun+CtEikM= X-Proofpoint-GUID: t0P8-M_F47uKscenqe00w5Uf3gDWjcis X-Proofpoint-ORIG-GUID: t0P8-M_F47uKscenqe00w5Uf3gDWjcis X-Proofpoint-Spam-Info: AW1haW4tMjYwODIxMDEyNiBTYWx0ZWRfX8f46JuQ/5YJH g29dmDkShX8H3R5C0YaTM1qTGhsE+QueMJSZy39hEQXFAyMt+KnUn1r0r0sEKC1AeGFbAS6/pgP GX8wIfoHjmLMDntqOK85u1PuUY17y/4= X-Authority-Analysis: v=2.4 cv=QJlYgALL c=1 sm=1 tr=0 ts=6a887857 cx=c_pps a=4ztaESFFfuz8Af0l9swBwA==:117 a=Ou0eQOY4+eZoSc0qltEV5Q==:17 a=IkcTkHD0fZMA:10 a=Sv0fKeRqtYgA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=_glEPmIy2e8OvE2BGh3C:22 a=EUspDBNiAAAA:8 a=cbMe9IPPLhjBV4UIYdkA:9 a=QEXdDO2ut3YA:10 a=TPnrazJqx2CeVZ-ItzZ-:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwODIxMDEyNiBTYWx0ZWRfX2gA4JUlypPJK Ph/GpJvFLlHrN6Y2UeDH4zbOls331UdrMPyI0TKqVIuPrehyigRQ6vKzonRzvShwBKzR6+xlQDp B9VhGfOiCz+qBRQCOT7dT0iPc8FW8VIONdkPoUcIwT4zCzP0jVUGIoxdJiFcT7GyHp2fZwTe6uR Z7vUMQmm8VJmq2Hl+Lafwz2vDXQTeksOSI4lCmA1Bk15fBGe1i2xuDpVporNlD1vubsSle5VxKp HlZbYUjCsf8fjZuw01KUEf4TgdD4eobzUXbWKquCb/6iDCHCqYN7GjFfkm775L3EQohAuTqv3JW Tos2KI95YgPBYwacHf4QW0F4E4RQD5CFi0BYSuKFHBmYtv1i+McrC1CCUk6uOlLSfbedaeWxCYZ 3f2MpLlNQgiF23Q0aWwm3jSmMrV2ftPa3+R3MPbTVh+jjSYXuHmX3B6KfmAKksOw+Hhf0zxlctF Bs6tIF8gfvrNYdNsyNA== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-08-21_05,2026-08-21_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 bulkscore=0 suspectscore=0 impostorscore=0 clxscore=1015 priorityscore=1501 spamscore=0 lowpriorityscore=0 phishscore=0 malwarescore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2608210126 Add the RPMh clock description for the Qualcomm Kuno SoC so the qcom,kuno-rpmh-clk compatible can provide the RPMh-managed clocks to consumers: the CXO div-2 (and always-on variant), RF clock 1 (and always-on variant), the QPIC BCM clock and the IPA clock. Reviewed-by: Dmitry Baryshkov Reviewed-by: Konrad Dybcio Signed-off-by: Hardeep Sharma --- drivers/clk/qcom/clk-rpmh.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/drivers/clk/qcom/clk-rpmh.c b/drivers/clk/qcom/clk-rpmh.c index 6367b2a5a4e0..d8c3a6b12d4a 100644 --- a/drivers/clk/qcom/clk-rpmh.c +++ b/drivers/clk/qcom/clk-rpmh.c @@ -943,6 +943,20 @@ static const struct clk_rpmh_desc clk_rpmh_kaanapali = { .num_clks = ARRAY_SIZE(kaanapali_rpmh_clocks), }; +static struct clk_hw *kuno_rpmh_clocks[] = { + [RPMH_CXO_CLK] = &clk_rpmh_bi_tcxo_div2.hw, + [RPMH_CXO_CLK_A] = &clk_rpmh_bi_tcxo_div2_ao.hw, + [RPMH_RF_CLK1] = &clk_rpmh_rf_clk1_a.hw, + [RPMH_RF_CLK1_A] = &clk_rpmh_rf_clk1_a_ao.hw, + [RPMH_QPIC_CLK] = &clk_rpmh_qpic_clk.hw, + [RPMH_IPA_CLK] = &clk_rpmh_ipa.hw, +}; + +static const struct clk_rpmh_desc clk_rpmh_kuno = { + .clks = kuno_rpmh_clocks, + .num_clks = ARRAY_SIZE(kuno_rpmh_clocks), +}; + static struct clk_hw *eliza_rpmh_clocks[] = { [RPMH_CXO_CLK] = &clk_rpmh_bi_tcxo_div2.hw, [RPMH_CXO_CLK_A] = &clk_rpmh_bi_tcxo_div2_ao.hw, @@ -1103,6 +1117,7 @@ static const struct of_device_id clk_rpmh_match_table[] = { { .compatible = "qcom,glymur-rpmh-clk", .data = &clk_rpmh_glymur}, { .compatible = "qcom,hawi-rpmh-clk", .data = &clk_rpmh_hawi}, { .compatible = "qcom,kaanapali-rpmh-clk", .data = &clk_rpmh_kaanapali}, + { .compatible = "qcom,kuno-rpmh-clk", .data = &clk_rpmh_kuno}, { .compatible = "qcom,milos-rpmh-clk", .data = &clk_rpmh_milos}, { .compatible = "qcom,nord-rpmh-clk", .data = &clk_rpmh_nord}, { .compatible = "qcom,qcs615-rpmh-clk", .data = &clk_rpmh_qcs615}, -- 2.43.0