From: Conor Dooley <conor@kernel.org>
To: wangjia@ultrarisc.com
Cc: Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Paul Walmsley <pjw@kernel.org>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Alexandre Ghiti <alex@ghiti.fr>,
Daniel Lezcano <daniel.lezcano@kernel.org>,
Thomas Gleixner <tglx@kernel.org>,
Samuel Holland <samuel.holland@sifive.com>,
Anup Patel <anup@brainfault.org>, Mark Brown <broonie@kernel.org>,
Andi Shyti <andi.shyti@kernel.org>,
Mika Westerberg <mika.westerberg@linux.intel.com>,
Andrew Lunn <andrew+netdev@lunn.ch>,
"David S. Miller" <davem@davemloft.net>,
Eric Dumazet <edumazet@google.com>,
Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
Alexandre Torgue <alexandre.torgue@foss.st.com>,
Giuseppe Cavallaro <peppe.cavallaro@st.com>,
Jose Abreu <joabreu@synopsys.com>,
Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>,
Vinod Koul <vkoul@kernel.org>, Frank Li <Frank.Li@kernel.org>,
Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@sifive.com>,
devicetree@vger.kernel.org, linux-riscv@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-spi@vger.kernel.org,
linux-i2c@vger.kernel.org, netdev@vger.kernel.org,
dmaengine@vger.kernel.org
Subject: Re: [PATCH 08/12] dt-bindings: net: snps,dwmac: Add compatible for UltraRISC DP1000 SoC
Date: Mon, 24 Aug 2026 18:13:25 +0100 [thread overview]
Message-ID: <20260824-blimp-spirited-01365897db24@spud> (raw)
In-Reply-To: <20260824-bride-food-052b313e4b76@spud>
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On Mon, Aug 24, 2026 at 06:09:48PM +0100, Conor Dooley wrote:
> On Mon, Aug 24, 2026 at 01:54:21PM +0800, Jia Wang via B4 Relay wrote:
> > From: Jia Wang <wangjia@ultrarisc.com>
> >
> > Add the SoC-specific compatible string for the UltraRISC DP1000 GMAC
> > controller to the DesignWare MAC binding.
> >
> > Signed-off-by: Jia Wang <wangjia@ultrarisc.com>
>
> The dts may not be right, but I am also a bit concerned here.
>
> This binding permits 100s of combinations of properties, of which only
> a very limited set can be correct for your device. Just adding the
> compatible permits all of this variation.
>
> Please add some restrictions.
In fact, it's particularly bad here because you don't even restrict
which fallback compatibles are used, so there's no guidance on what
version of the IP is even in use!
>
> pw-bot: changes-requested
>
> Thanks,
> Conor.
>
> > ---
> > Documentation/devicetree/bindings/net/snps,dwmac.yaml | 1 +
> > 1 file changed, 1 insertion(+)
> >
> > diff --git a/Documentation/devicetree/bindings/net/snps,dwmac.yaml b/Documentation/devicetree/bindings/net/snps,dwmac.yaml
> > index 2449311c6d28..2ed4564ae99d 100644
> > --- a/Documentation/devicetree/bindings/net/snps,dwmac.yaml
> > +++ b/Documentation/devicetree/bindings/net/snps,dwmac.yaml
> > @@ -119,6 +119,7 @@ properties:
> > - starfive,jh7110-dwmac
> > - tesla,fsd-ethqos
> > - thead,th1520-gmac
> > + - ultrarisc,dp1000-gmac
> >
> > reg:
> > minItems: 1
> >
> > --
> > 2.34.1
> >
> >
> >
> > _______________________________________________
> > linux-riscv mailing list
> > linux-riscv@lists.infradead.org
> > http://lists.infradead.org/mailman/listinfo/linux-riscv
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next prev parent reply other threads:[~2026-08-24 17:13 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-08-24 5:54 [PATCH 00/12] riscv: Add device tree support for UltraRISC DP1000 Jia Wang via B4 Relay
2026-08-24 5:54 ` [PATCH 01/12] dt-bindings: riscv: cpus: Fix yamllint style issues Jia Wang via B4 Relay
2026-08-24 16:35 ` Conor Dooley
2026-08-24 5:54 ` [PATCH 02/12] dt-bindings: vendor-prefixes: Add shenrongda Jia Wang via B4 Relay
2026-08-24 17:03 ` Conor Dooley
2026-08-24 5:54 ` [PATCH 03/12] dt-bindings: riscv: cpus: Add UltraRISC CP100 compatible Jia Wang via B4 Relay
2026-08-24 17:02 ` Conor Dooley
2026-08-24 5:54 ` [PATCH 04/12] dt-bindings: riscv: Add UltraRISC DP1000 board compatibles Jia Wang via B4 Relay
2026-08-24 17:04 ` Conor Dooley
2026-08-24 5:54 ` [PATCH 05/12] dt-bindings: timer: Add UltraRISC DP1000 CLINT Jia Wang via B4 Relay
2026-08-24 17:05 ` Conor Dooley
2026-08-24 5:54 ` [PATCH 06/12] spi: dt-bindings: snps,dw-apb-ssi: Add compatible for UltraRISC DP1000 SoC Jia Wang via B4 Relay
2026-08-24 17:07 ` Conor Dooley
2026-08-24 17:15 ` Conor Dooley
2026-08-24 5:54 ` [PATCH 07/12] dt-bindings: i2c: dw: " Jia Wang via B4 Relay
2026-08-24 17:07 ` Conor Dooley
2026-08-24 17:14 ` Conor Dooley
2026-08-24 5:54 ` [PATCH 08/12] dt-bindings: net: snps,dwmac: " Jia Wang via B4 Relay
2026-08-24 17:09 ` Conor Dooley
2026-08-24 17:13 ` Conor Dooley [this message]
2026-08-24 5:54 ` [PATCH 09/12] dt-bindings: dma: snps,dw-axi-dmac: Add UltraRISC DP1000 compatible Jia Wang via B4 Relay
2026-08-24 17:03 ` Conor Dooley
2026-08-24 17:11 ` Conor Dooley
2026-08-24 5:54 ` [PATCH 10/12] riscv: dts: ultrarisc: Add initial device tree for UltraRISC DP1000 Jia Wang via B4 Relay
2026-08-24 5:54 ` [PATCH 11/12] riscv: dts: ultrarisc: Add Shenzhen Rongda M0 board device tree Jia Wang via B4 Relay
2026-08-24 13:02 ` Andrew Lunn
2026-08-24 5:54 ` [PATCH 12/12] riscv: dts: ultrarisc: Add Milk-V Titan " Jia Wang via B4 Relay
2026-08-24 13:06 ` Andrew Lunn
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