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Unal" , Daniel Golle , Andrew Lunn , Vladimir Oltean , Felix Fietkau , Lorenzo Bianconi , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , netdev@vger.kernel.org Cc: Russell King , Qingfang Deng , Matthias Brugger , AngeloGioacchino Del Regno , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, Aleksei Sviridkin Subject: [PATCH net v2 2/2] net: ethernet: mtk_eth_soc: populate lpi_interfaces to fix EEE support Date: Mon, 24 Aug 2026 05:41:17 +0300 Message-ID: <20260824024117.46154-3-f@lex.la> X-Mailer: git-send-email 2.55.0 In-Reply-To: <20260824024117.46154-1-f@lex.la> References: <20260824024117.46154-1-f@lex.la> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit mtk_add_mac() fills in lpi_capabilities and lpi_timer_default but never lpi_interfaces, so phylink treats every MAC that uses mtk_phylink_ops as not supporting EEE: ethtool reports "Not supported" and phy_disable_eee() keeps userspace locked out. MT7628 is unaffected, as rt5350_phylink_ops has no tx_lpi methods. Copy the supported interfaces into lpi_interfaces once the SoC specific fixups have finished changing them, and leave 2.5 Gbps out for now: drop 2500BASE-X from the copy and MAC_2500FD from lpi_capabilities. MAC_MCR folds SPEED_2500 onto MAC_MCR_SPEED_1000, so MAC_MCR_EEE1G is what would govern LPI on such a link, and it is unvalidated rather than unsupported: MediaTek's SDK driver sets the EEE force bits for 100 Mbps and 1 Gbps link speed only, EEE signalling on 2500BASE-X is outside 802.3, and the 1 us unit of the wakeup timers is undocumented with the port clock at 2.5 times the rate. Narrowing lpi_capabilities alone would not do it, since it gates on the media speed a rate matching PHY reports rather than on the speed the MAC runs at. Drop the xGMII modes too, which mtk_mac_enable_tx_lpi() refuses outright and which on netsys v3 include the mode of MT7988's built-in 2.5G PHY. LPI stays off until userspace enables it. The EEE advertisement of a PHY that advertises it out of reset does come back, since phylink stops force-clearing it. Fixes: 952d7325362f ("net: ethernet: mediatek: add EEE support") Signed-off-by: Aleksei Sviridkin --- On leaving 2.5 Gbps out: the absence of 2.5 Gbps EEE force bits in MAC_MCR is not the argument, since the same reasoning applied to the speed field would say the MAC cannot do 2.5 Gbps at all - 2500BASE-X here is 1000BASE-X at 2.5 times the clock, and the MAC does not know the difference. MAC_2500FD was deliberate in the original EEE submission [1], which set MAC_MCR_EEE1G for SPEED_2500 and SPEED_1000 alike. The masks say nobody has validated it, not that the hardware refuses. On the netsys v3 switch MAC the xGMII filter empties lpi_interfaces outright, as PHY_INTERFACE_MODE_INTERNAL is the only interface it supports. It is a fixed link port with no PHY, so phylink had no EEE to manage there before this patch either. Pre-existing, made live by this patch and not addressed here: mtk_mac_enable_tx_lpi() programs MT7531's reset wakeup times (17 for 1 Gbps, 36 for 100 Mbps) whenever it runs, as its own comment says, so they now apply to every SoC driven by mtk_phylink_ops once a user enables EEE on an eligible interface. Those values do not appear to have been confirmed for MT7981, MT7986 or MT7988. [1] https://lore.kernel.org/all/20250210125246.1950142-1-dqfext@gmail.com/ drivers/net/ethernet/mediatek/mtk_eth_soc.c | 22 ++++++++++++++++++--- 1 file changed, 19 insertions(+), 3 deletions(-) diff --git a/drivers/net/ethernet/mediatek/mtk_eth_soc.c b/drivers/net/ethernet/mediatek/mtk_eth_soc.c index be3bd025c41a..37a831f73da6 100644 --- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c +++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c @@ -4828,7 +4828,7 @@ static int mtk_add_mac(struct mtk_eth *eth, struct device_node *np) phy_interface_t phy_mode; struct phylink *phylink; struct mtk_mac *mac; - int id, err; + int id, err, i; int txqs = 1; u32 val; @@ -4907,8 +4907,11 @@ static int mtk_add_mac(struct mtk_eth *eth, struct device_node *np) mac->phylink_config.type = PHYLINK_NETDEV; mac->phylink_config.mac_capabilities = MAC_ASYM_PAUSE | MAC_SYM_PAUSE | MAC_10 | MAC_100 | MAC_1000 | MAC_2500FD; - mac->phylink_config.lpi_capabilities = MAC_100FD | MAC_1000FD | - MAC_2500FD; + /* MAC_MCR folds SPEED_2500 onto MAC_MCR_SPEED_1000, so LPI above + * 1 Gbps would be governed by MAC_MCR_EEE1G and is unvalidated + * rather than unsupported. + */ + mac->phylink_config.lpi_capabilities = MAC_100FD | MAC_1000FD; mac->phylink_config.lpi_timer_default = 1000; /* MT7623 gmac0 is now missing its speed-specific PLL configuration @@ -4966,6 +4969,19 @@ static int mtk_add_mac(struct mtk_eth *eth, struct device_node *np) __set_bit(PHY_INTERFACE_MODE_INTERNAL, mac->phylink_config.supported_interfaces); + phy_interface_copy(mac->phylink_config.lpi_interfaces, + mac->phylink_config.supported_interfaces); + + /* The MAC side of 2500BASE-X is never below 2.5 Gbps, not even when + * a rate matching PHY drops the media to 1 Gbps, and + * mtk_mac_enable_tx_lpi() refuses the xGMII modes outright. + */ + __clear_bit(PHY_INTERFACE_MODE_2500BASEX, + mac->phylink_config.lpi_interfaces); + for (i = 0; i < PHY_INTERFACE_MODE_MAX; i++) + if (mtk_interface_mode_is_xgmii(eth, i)) + __clear_bit(i, mac->phylink_config.lpi_interfaces); + phylink = phylink_create(&mac->phylink_config, of_fwnode_handle(mac->of_node), phy_mode, mac_ops); -- 2.55.0