[PATCH] drm/amdgpu/smu: Enable UCLK after init in AMD Radeon Pro 5300

[Atharva Tiwari <atharvatiwarilinuxdev@gmail.com>]

On the AMD Radeon PRO 5300, enabling UCLK_BIT in
navi10_init_allowed_features causes errors such as:

SMU: No response msg_reg: 6 resp_reg: 0

or:

SMU: I'm not done with your previous command: SMN_C2PMSG_66:0x00000006 SMN_C2PMSG_82:0x00000000

To work around this issue, we use smu_set_pp_feature_mask() to enable UCLK_BIT instead.

Fixes:
https://gitlab.freedesktop.org/drm/amd/-/work_items/4895

Tested-by: Guna R. Bharati <062bel313@gmail.com>
Signed-off-by: Atharva Tiwari <atharvatiwarilinuxdev@gmail.com>
---
 drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c     | 33 +++++++++++++++++++
 .../gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c   |  7 +++-
 2 files changed, 39 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
index 3969a7670..c05ceb0be 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
@@ -905,6 +905,33 @@ static int smu_apply_default_config_table_settings(struct smu_context *smu)
 	return smu_set_config_table(smu, &adev->pm.config_table);
 }
 
+static int smu_apply_late_quirks(struct smu_context *smu)
+{
+	struct pci_dev *pdev = smu->adev->pdev;
+	int ret = 0;
+	uint32_t features[2];
+	struct smu_feature_bits feature_mask;
+	uint64_t mask;
+
+	if (pdev->device == 0x7340 &&
+			pdev->subsystem_vendor == PCI_VENDOR_ID_APPLE &&
+			pdev->subsystem_device == 0x0219) {
+		ret = smu_feature_get_enabled_mask(smu, &feature_mask);
+		if (ret)
+			return ret;
+
+		smu_feature_bits_to_arr32(&feature_mask, features, 64);
+		features[0] |= BIT(3);
+		mask = ((uint64_t)features[1] << 32) | features[0];
+
+		ret = smu_set_pp_feature_mask(smu, mask);
+		if (ret)
+			return ret;
+	}
+
+	return 0;
+}
+
 static int smu_late_init(struct amdgpu_ip_block *ip_block)
 {
 	struct amdgpu_device *adev = ip_block->adev;
@@ -977,6 +1004,12 @@ static int smu_late_init(struct amdgpu_ip_block *ip_block)
 
 	smu_restore_dpm_user_profile(smu);
 
+	ret = smu_apply_late_quirks(smu);
+	if (ret) {
+		dev_err(adev->dev, "Unable to apply late quirks\n");
+		return ret;
+	}
+
 	return 0;
 }
 
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
index 6dfc3b585..ed67e4bfc 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
@@ -349,7 +349,12 @@ navi10_init_allowed_features(struct smu_context *smu)
 	      (amdgpu_ip_version(adev, MP1_HWIP, 0) == IP_VERSION(11, 0, 0)) &&
 	      (adev->rev_id == 0)) &&
 	    (adev->pm.pp_feature & PP_MCLK_DPM_MASK)) {
-		smu_feature_list_set_bit(smu, SMU_FEATURE_LIST_ALLOWED, FEATURE_DPM_UCLK_BIT);
+		if (!(adev->pdev->device == 0x7340 &&
+				adev->pdev->subsystem_vendor == PCI_VENDOR_ID_APPLE &&
+				adev->pdev->subsystem_device == 0x0219))
+			smu_feature_list_set_bit(smu, SMU_FEATURE_LIST_ALLOWED,
+					FEATURE_DPM_UCLK_BIT);
+
 		smu_feature_list_set_bit(smu, SMU_FEATURE_LIST_ALLOWED, FEATURE_MEM_VDDCI_SCALING_BIT);
 		smu_feature_list_set_bit(smu, SMU_FEATURE_LIST_ALLOWED, FEATURE_MEM_MVDD_SCALING_BIT);
 	}
-- 
2.43.0