From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E13443F7AB2; Tue, 25 Aug 2026 10:48:40 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1787654921; cv=none; b=Gvq+9PGluVOvOaNKDHUXfAPrGYKEEScWDo6dJxk+KfExLhdQKdZ9v3q386/kVbULgCkQMErVHwGH+vRk17hasNTwLcYEu4L82VVgt1iVjA5TqXdXiMMpIhrnci6M/K/VGZeq5Ly45jAiOfiY3kuZ6wdLYJ+vhbImvq69IPhNEOg= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1787654921; c=relaxed/simple; bh=x266lsRftT8i25oBXl2ssgbHQhGOw8P7oh+KboxNXTY=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=d11LqvlbZp7rfrpRtIzsIVBtHKvU2o+96qXubCMljsiL70WsT4Y5F0TqAh+DnwMKqGnqUaDM0/0mepQoBYULrGEdJ8NRKNQ2zjOV0HlHWJ+kZ3Rjfomr/wxuo/ZFWynrOt7DQngx2RBFtYFKH97ECJ4fdf5H3rfA2k/2DJua5Qc= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=Ldg8AWTC; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="Ldg8AWTC" Received: by smtp.kernel.org (Postfix) with ESMTPS id B1390C2BCF6; Tue, 25 Aug 2026 10:48:40 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1787654920; bh=x266lsRftT8i25oBXl2ssgbHQhGOw8P7oh+KboxNXTY=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=Ldg8AWTCDVogCcai4gszswCHs9eSDdODDdRjahUKw3ZX/AU+VXyQoXQxaTQ7mO15M evp4etERmhZY400cY3ODC7ayCmsRTDTqmwweKSikykjssHTATj+x6kEn/8f/4Yj8nv qTHSMLkk9gNZt+XkpvU07XKpWzMLT1Ajs0NMfNOMYbmrIYc5xQOTQJG9nGP0uXxmKT YwwL5llv8UorvLq5tzlQBY1G/e44sRy6nPgVKUjTe0aaEcXEXzZQ2CwyO4kpralhr4 PpEDGyTxJY+2x0XM+pCnt90G41uWMD9MWgyKbuq7PA9tIeH5T9WsTn7yoI5arYBcGe 1WxesrBuTUjVw== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9FA3BC61DC2; Tue, 25 Aug 2026 10:48:40 +0000 (UTC) From: Colin Huang via B4 Relay Date: Tue, 25 Aug 2026 18:47:49 +0800 Subject: [PATCH v6 08/12] ARM: dts: aspeed: anacapa: Enable MCTP and FRU for NIC Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260825-anacapa-devlop-phase-devicetree-v6-8-9059a2a279ce@gmail.com> References: <20260825-anacapa-devlop-phase-devicetree-v6-0-9059a2a279ce@gmail.com> In-Reply-To: <20260825-anacapa-devlop-phase-devicetree-v6-0-9059a2a279ce@gmail.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Joel Stanley , Andrew Jeffery Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-aspeed@lists.ozlabs.org, linux-kernel@vger.kernel.org, colin.huang2@amd.com, Colin Huang , Andy Chung X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1787654905; l=3240; i=u8813345@gmail.com; s=20260202; h=from:subject:message-id; bh=dOnAmtbd66IVx7oXtqFQ1g3XoTMO1Ryg0F0x9FVbMP8=; b=ftyDPTkjdoGzotF4l5iWYs6uhTqylEgD5qyrES/Ylqri27+Dso7FI2I0uqGRiBcqYUp1nMkgc Dw7Lg2km/n5BgNptYTxctfAUFsGd5PPJiJW0yhYnmlyaZzPlc0+/kUh X-Developer-Key: i=u8813345@gmail.com; a=ed25519; pk=Zlg0WqpCw4qbswOqamTBTXIchwR/3SnYZpy7rjaGMdQ= X-Endpoint-Received: by B4 Relay for u8813345@gmail.com/20260202 with auth_id=761 X-Original-From: Colin Huang Reply-To: u8813345@gmail.com From: Andy Chung Add the mctp-controller property to enable frontend NIC management via PLDM over MCTP. Also add EEPROM device for NIC FRU and reorder the I2C virtual bus index accroding to the system silkscreen index. Signed-off-by: Andy Chung --- .../aspeed/aspeed-bmc-facebook-anacapa-evt2.dts | 137 +++++++++++++++++++++ 1 file changed, 137 insertions(+) diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-anacapa-evt2.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-anacapa-evt2.dts index 7c641a79f63e..7fe8d279202a 100644 --- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-anacapa-evt2.dts +++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-anacapa-evt2.dts @@ -8,6 +8,25 @@ / { model = "Facebook Anacapa BMC"; }; +&{/aliases} { + i2c36 = &i2c11mux0ch5; + i2c37 = &i2c11mux0ch6; + i2c38 = &i2c11mux0ch7; + i2c39 = &i2c11mux0ch0; + i2c40 = &i2c11mux0ch1; + i2c41 = &i2c11mux0ch2; + i2c42 = &i2c11mux0ch3; + i2c43 = &i2c11mux0ch4; + i2c44 = &i2c10mux0ch1; + i2c45 = &i2c10mux0ch2; + i2c46 = &i2c10mux0ch3; + i2c47 = &i2c10mux0ch4; + i2c48 = &i2c10mux0ch5; + i2c49 = &i2c10mux0ch6; + i2c50 = &i2c10mux0ch7; + i2c51 = &i2c10mux0ch0; +}; + // MB - PDB &i2c8 { i2c-mux@72 { @@ -56,6 +75,124 @@ eeprom@51 { }; }; +// R Bridge Board +&i2c10 { + multi-master; + + mctp@10 { + compatible = "mctp-i2c-controller"; + reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>; + }; + + i2c-mux@71 { + /delete-property/ i2c-mux-idle-disconnect; + + i2c10mux0ch1: i2c@1 { + mctp-controller; + // BE NIC FRU + + eeprom@50 { + compatible = "atmel,24c32"; + reg = <0x50>; + }; + }; + + i2c10mux0ch2: i2c@2 { + mctp-controller; + // BE NIC FRU + + eeprom@50 { + compatible = "atmel,24c32"; + reg = <0x50>; + }; + }; + + i2c10mux0ch3: i2c@3 { + mctp-controller; + // BE NIC FRU + + eeprom@50 { + compatible = "atmel,24c32"; + reg = <0x50>; + }; + }; + + i2c10mux0ch4: i2c@4 { + mctp-controller; + // BE NIC FRU + + eeprom@50 { + compatible = "atmel,24c32"; + reg = <0x50>; + }; + }; + }; +}; + +// L Bridge Board +&i2c11 { + multi-master; + + mctp@10 { + compatible = "mctp-i2c-controller"; + reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>; + }; + + i2c-mux@71 { + /delete-property/ i2c-mux-idle-disconnect; + + i2c11mux0ch0: i2c@0 { + mctp-controller; + // FE NIC FRU + + eeprom@50 { + compatible = "atmel,24c32"; + reg = <0x50>; + }; + }; + + i2c11mux0ch1: i2c@1 { + mctp-controller; + // BE NIC FRU + + eeprom@50 { + compatible = "atmel,24c32"; + reg = <0x50>; + }; + }; + + i2c11mux0ch2: i2c@2 { + mctp-controller; + // BE NIC FRU + + eeprom@50 { + compatible = "atmel,24c32"; + reg = <0x50>; + }; + }; + + i2c11mux0ch3: i2c@3 { + mctp-controller; + // BE NIC FRU + + eeprom@50 { + compatible = "atmel,24c32"; + reg = <0x50>; + }; + }; + + i2c11mux0ch4: i2c@4 { + mctp-controller; + // BE NIC FRU + + eeprom@50 { + compatible = "atmel,24c32"; + reg = <0x50>; + }; + }; + }; +}; + // MB &i2c13 { i2c-mux@70 { -- 2.34.1