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The driver uses its presence to identify a context bank as dedicated for extended IOVA mapping and programs the SMMU with an iommu-addresses range to push allocations into the wider address space. Relax #address-cells to enum: [1, 2] and #size-cells to enum: [0, 2] to allow platforms that require 64-bit values in iommu-addresses to pass binding validation. Signed-off-by: Vinayak Katoch --- Documentation/devicetree/bindings/misc/qcom,fastrpc.yaml | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/misc/qcom,fastrpc.yaml b/Documentation/devicetree/bindings/misc/qcom,fastrpc.yaml index e945c8ba75e3..f9830ef37814 100644 --- a/Documentation/devicetree/bindings/misc/qcom,fastrpc.yaml +++ b/Documentation/devicetree/bindings/misc/qcom,fastrpc.yaml @@ -73,10 +73,10 @@ properties: $ref: /schemas/types.yaml#/definitions/uint32-array "#address-cells": - const: 1 + enum: [1, 2] "#size-cells": - const: 0 + enum: [0, 2] patternProperties: "(compute-)?cb@[0-9]*$": @@ -98,6 +98,14 @@ patternProperties: minItems: 1 maxItems: 10 + memory-region: + maxItems: 1 + description: + Phandle to a reserved-memory node whose iommu-addresses property + blocks the lower IOVA range, forcing allocations into the extended + address space. Its presence marks this context bank as an extended + mapping bank. + qcom,nsessions: $ref: /schemas/types.yaml#/definitions/uint32 default: 1 -- 2.34.1