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Tue, 25 Aug 2026 19:40:41 -0700 (PDT) From: Yuanshen Cao Date: Wed, 26 Aug 2026 02:40:28 +0000 Subject: [PATCH v5 2/5] dmaengine: sun6i-dma: Support variable address widths using masks Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260826-sun60i-a733-dma-v5-2-abc5229b441e@gmail.com> References: <20260826-sun60i-a733-dma-v5-0-abc5229b441e@gmail.com> In-Reply-To: <20260826-sun60i-a733-dma-v5-0-abc5229b441e@gmail.com> To: Vinod Koul , Frank Li , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Maxime Ripard Cc: dmaengine@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Yuanshen Cao X-Mailer: b4 0.16.0 The Allwinner A733 DMA controller supports higher addresses (up to 32G) compared to previous generations. The existing `sun6i_dma_set_addr` function uses hardcoded logic for setting the high-address bits in the LLI parameters. Add `src_high_addr_mask` and `dst_high_addr_mask` to `struct sun6i_dma_config` to handle different high-address bitfield mappings. Update `sun6i_dma_set_addr` to use these masks via `field_prep()`, allowing the driver to support variable address widths. Signed-off-by: Yuanshen Cao --- drivers/dma/sun6i-dma.c | 18 +++++++++++------- 1 file changed, 11 insertions(+), 7 deletions(-) diff --git a/drivers/dma/sun6i-dma.c b/drivers/dma/sun6i-dma.c index f305fbfb3545..1ffd870d9594 100644 --- a/drivers/dma/sun6i-dma.c +++ b/drivers/dma/sun6i-dma.c @@ -7,6 +7,7 @@ * Maxime Ripard */ +#include #include #include #include @@ -103,8 +104,8 @@ * The LLI link physical address is also mangled, but we avoid dealing * with that by allocating LLIs from the DMA32 zone. */ -#define SRC_HIGH_ADDR(x) (((x) & 0x3U) << 16) -#define DST_HIGH_ADDR(x) (((x) & 0x3U) << 18) +#define SRC_HIGH_ADDR_MASK GENMASK(17, 16) +#define DST_HIGH_ADDR_MASK GENMASK(19, 18) /* * Various hardware related defines @@ -147,7 +148,8 @@ struct sun6i_dma_config { u32 dst_burst_lengths; u32 src_addr_widths; u32 dst_addr_widths; - bool has_high_addr; + u32 src_high_addr_mask; + u32 dst_high_addr_mask; bool has_mbus_clk; u32 irq_stride; u32 irq_en_offset; @@ -687,9 +689,10 @@ static inline void sun6i_dma_set_addr(struct sun6i_dma_dev *sdev, v_lli->src = lower_32_bits(src); v_lli->dst = lower_32_bits(dst); - if (sdev->cfg->has_high_addr) - v_lli->para |= SRC_HIGH_ADDR(upper_32_bits(src)) | - DST_HIGH_ADDR(upper_32_bits(dst)); + if (sdev->cfg->src_high_addr_mask) + v_lli->para |= + field_prep(sdev->cfg->src_high_addr_mask, upper_32_bits(src)) | + field_prep(sdev->cfg->dst_high_addr_mask, upper_32_bits(dst)); } static struct dma_async_tx_descriptor *sun6i_dma_prep_dma_memcpy( @@ -1283,7 +1286,8 @@ static struct sun6i_dma_config sun50i_a100_dma_cfg = { BIT(DMA_SLAVE_BUSWIDTH_2_BYTES) | BIT(DMA_SLAVE_BUSWIDTH_4_BYTES) | BIT(DMA_SLAVE_BUSWIDTH_8_BYTES), - .has_high_addr = true, + .src_high_addr_mask = SRC_HIGH_ADDR_MASK, + .dst_high_addr_mask = DST_HIGH_ADDR_MASK, .has_mbus_clk = true, SUN6I_DMA_IRQ_A31_COMMON_CFG }; -- 2.55.0