From: Krzysztof Kozlowski <krzk@kernel.org>
To: Faruque Ansari <faruque.ansari@oss.qualcomm.com>
Cc: "Oleksij Rempel" <o.rempel@pengutronix.de>,
"Pengutronix Kernel Team" <kernel@pengutronix.de>,
"Sebastian Reichel" <sre@kernel.org>,
"Rob Herring" <robh@kernel.org>,
"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
"Wim Van Sebroeck" <wim@linux-watchdog.org>,
"Guenter Roeck" <linux@roeck-us.net>,
"Benson Leung" <bleung@chromium.org>,
"Tzung-Bi Shih" <tzungbi@kernel.org>,
"Srinivas Kandagatla" <srini@kernel.org>,
"Daniel Lezcano" <daniel.lezcano@kernel.org>,
linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-pm@vger.kernel.org, devicetree@vger.kernel.org,
linux-watchdog@vger.kernel.org,
"Liam Girdwood" <lgirdwood@gmail.com>,
"Mark Brown" <broonie@kernel.org>,
"Rafael J. Wysocki" <rafael@kernel.org>,
"Zhang Rui" <rui.zhang@intel.com>,
"Lukasz Luba" <lukasz.luba@arm.com>,
"Søren Andersen" <san@skov.dk>,
"Guenter Roeck" <groeck@chromium.org>,
"Matti Vaittinen" <mazziesaccount@gmail.com>,
"Ahmad Fatoum" <a.fatoum@pengutronix.de>,
"Andrew Morton" <akpm@linux-foundation.org>,
avaneesh.dwivedi@oss.qualcomm.com,
"Umang Chheda" <umang.chheda@oss.qualcomm.com>
Subject: Re: [PATCH v2 1/4] dt-bindings: power: reset: add PSCRR NVMEM recorder binding
Date: Thu, 27 Aug 2026 11:45:51 +0200 [thread overview]
Message-ID: <20260827-spiffy-effective-hare-c05f53@quoll> (raw)
In-Reply-To: <20260819-pscrr-provider-v2-1-9072383e0f4d@oss.qualcomm.com>
On Wed, Aug 19, 2026 at 10:50:43PM +0530, Faruque Ansari wrote:
> Add binding for the PSCRR NVMEM recorder. Records the power state
> change reason into a small NVMEM cell, such as a PMIC SDAM byte or
> RTC scratch register — so the cause survives a power cycle and can be
> read back on the next boot.
A nit, subject: drop second/last, redundant "binding". The
"dt-bindings" prefix is already stating that these are bindings.
See also:
https://elixir.bootlin.com/linux/v7.1-rc7/source/Documentation/devicetree/bindings/submitting-patches.rst#L23
>
> Signed-off-by: Faruque Ansari <faruque.ansari@oss.qualcomm.com>
> ---
> .../bindings/power/reset/pscrr-nvmem.yaml | 59 ++++++++++++++++++++++
> MAINTAINERS | 1 +
> 2 files changed, 60 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/power/reset/pscrr-nvmem.yaml b/Documentation/devicetree/bindings/power/reset/pscrr-nvmem.yaml
> new file mode 100644
> index 000000000000..5334c923d644
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/power/reset/pscrr-nvmem.yaml
> @@ -0,0 +1,59 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/power/reset/pscrr-nvmem.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: NVMEM Power State Change Reason recorder
> +
> +maintainers:
> + - Faruque Ansari <faruque.ansari@oss.qualcomm.com>
> + - Oleksij Rempel <o.rempel@pengutronix.de>
> +
> +description:
> + An NVMEM-backed recorder for Power State Change Reasons (PSCRR). Persists
> + the reboot or shutdown cause into a small NVMEM cell, such as an RTC
> + scratch register, a PMIC SDAM (Scratch Data Access Memory) byte, or an
> + EEPROM — so the reason survives a power cycle and can be read back on the
> + next boot. The cell is referenced via the standard nvmem-cells consumer
> + binding.
I do not see how this should be a separate device. This should be rather part
of PSCRR, reboot handler or just the nvmem. Otherwise it is just device
node for instantiating driver.
Best regards,
Krzysztof
next prev parent reply other threads:[~2026-08-27 9:45 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-08-19 17:20 [PATCH v2 0/4] power: reset: add NVMEM recorder provider for PSCRR Faruque Ansari
2026-08-19 17:20 ` [PATCH v2 1/4] dt-bindings: power: reset: add PSCRR NVMEM recorder binding Faruque Ansari
2026-08-27 9:45 ` Krzysztof Kozlowski [this message]
2026-09-02 12:44 ` Faruque Ansari
2026-08-19 17:20 ` [PATCH v2 2/4] power: reset: add PSCRR NVMEM recorder Faruque Ansari
2026-08-19 17:20 ` [PATCH v2 3/4] nvmem: provide consumer access to cell size metrics Faruque Ansari
2026-08-19 17:20 ` [PATCH v2 4/4] arm64: dts: qcom: lemans: Add PSCRR NVMEM recorder node Faruque Ansari
2026-08-19 18:55 ` Abel Vesa
2026-08-24 9:17 ` Faruque Ansari
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20260827-spiffy-effective-hare-c05f53@quoll \
--to=krzk@kernel.org \
--cc=a.fatoum@pengutronix.de \
--cc=akpm@linux-foundation.org \
--cc=avaneesh.dwivedi@oss.qualcomm.com \
--cc=bleung@chromium.org \
--cc=broonie@kernel.org \
--cc=daniel.lezcano@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=faruque.ansari@oss.qualcomm.com \
--cc=groeck@chromium.org \
--cc=kernel@pengutronix.de \
--cc=krzk+dt@kernel.org \
--cc=lgirdwood@gmail.com \
--cc=linux-arm-msm@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pm@vger.kernel.org \
--cc=linux-watchdog@vger.kernel.org \
--cc=linux@roeck-us.net \
--cc=lukasz.luba@arm.com \
--cc=mazziesaccount@gmail.com \
--cc=o.rempel@pengutronix.de \
--cc=rafael@kernel.org \
--cc=robh@kernel.org \
--cc=rui.zhang@intel.com \
--cc=san@skov.dk \
--cc=sre@kernel.org \
--cc=srini@kernel.org \
--cc=tzungbi@kernel.org \
--cc=umang.chheda@oss.qualcomm.com \
--cc=wim@linux-watchdog.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox
all inboxes | Powered by JetHome®