From: Stanislaw Pal <kuncy7@gmail.com>
To: George Moussalem <george.moussalem@outlook.com>,
Vinod Koul <vkoul@kernel.org>,
Neil Armstrong <neil.armstrong@linaro.org>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Praveenkumar I <praveenkumar.i@oss.qualcomm.com>,
Philipp Zabel <p.zabel@pengutronix.de>,
Bjorn Andersson <andersson@kernel.org>,
Konrad Dybcio <konradybcio@kernel.org>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Varadarajan Narayanan <varadarajan.narayanan@oss.qualcomm.com>,
Nitheesh Sekar <quic_nsekar@quicinc.com>,
Wesley Cheng <quic_wcheng@quicinc.com>,
Manivannan Sadhasivam <mani@kernel.org>
Cc: linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org,
devicetree@vger.kernel.org, linux-usb@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v3 00/12] Enable USB3 for Qualcomm IPQ5018
Date: Thu, 27 Aug 2026 21:06:47 +0200 [thread overview]
Message-ID: <20260827190647.807193-1-kuncy7@gmail.com> (raw)
In-Reply-To: <20260825-ipq5018-usb3-v3-0-39be0955a6aa@outlook.com>
Tested this revision on IPQ5018 hardware - a TP-Link Archer AX55 v1,
backported onto 6.18.44. Both radios on this board are on AHB and PCIe
is unused, so nothing else contends for the SS PHY; the combo driver is
exercised purely on its USB3 side here.
Two USB 3.2 gen 1 sticks, all enumerating SuperSpeed (speed=5000,
version=3.20, 5000M in lsusb -t):
- hot-plug, both sticks;
- warm reboot with the stick inserted - SuperSpeed 0.8 s after xHCI
registers;
- cold power-on with the stick inserted - same, no fall back to
480M;
- 130 MB/s sustained over a 3 GB raw read, unchanged from the
previous revision on the same stick;
- no USB or xHCI error in dmesg across the whole run.
I also exercised the vdd-supply path that patch 12 adds to the RDP432-C2,
since enable/disable sits in phy_init/phy_shutdown and that is the code
this revision rewrites: unbinding dwc3-qcom drops the port's 5 V rail and
the device disappears, re-binding brings it back at SuperSpeed 1.8 s
later. Works on this board too.
I do not have an IPQ5332, so the combo PHY's PCIe side and the 5332
instance are untested by me.
Tested-by: Stanislaw Pal <kuncy7@gmail.com>
prev parent reply other threads:[~2026-08-27 19:06 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-08-25 12:37 George Moussalem via B4 Relay
2026-08-25 12:37 ` [PATCH v3 01/12] dt-bindings: phy: qcom,ipq5332-uniphy-pcie: Change to PCIe/USB3 combo PHY George Moussalem via B4 Relay
2026-08-28 10:09 ` Krzysztof Kozlowski
2026-08-28 10:51 ` George Moussalem
2026-08-25 12:37 ` [PATCH v3 02/12] dt-bindings: phy: qcom,ipq5332-uniphy-pcie-usb3: Document the IPQ5018 USB3 PHY George Moussalem via B4 Relay
2026-08-25 12:37 ` [PATCH v3 03/12] phy: qualcomm: qcom-uniphy-pcie-28lp: Convert to PCIe/USB3 combo PHY driver George Moussalem via B4 Relay
2026-08-25 12:37 ` [PATCH v3 04/12] phy: qualcomm: qcom-uniphy-pcie-usb3-28lp: Refactor init regs table definitions George Moussalem via B4 Relay
2026-08-25 12:37 ` [PATCH v3 05/12] phy: qualcomm: qcom-uniphy-pcie-usb3-28lp: Use bulk reset_control API George Moussalem via B4 Relay
2026-08-25 12:37 ` [PATCH v3 06/12] phy: qualcomm: qcom-uniphy-pcie-usb3-28lp: Improve error handling in power_on George Moussalem via B4 Relay
2026-08-25 12:37 ` [PATCH v3 07/12] phy: qualcomm: qcom-uniphy-pcie-usb3-28lp: Add support for USB3 PHY on IPQ5018 George Moussalem via B4 Relay
2026-08-25 12:37 ` [PATCH v3 08/12] arm64: dts: qcom: ipq5018: Add USB Super-Speed PHY node George Moussalem via B4 Relay
2026-08-25 12:37 ` [PATCH v3 09/12] dt-bindings: usb: qcom,snps-dwc3: Add clocks for USB3 on Qualcomm IPQ5018 George Moussalem via B4 Relay
2026-08-25 12:37 ` [PATCH v3 10/12] arm64: dts: qcom: ipq5018: Add clocks required for USB3 support George Moussalem via B4 Relay
2026-08-25 12:37 ` [PATCH v3 11/12] arm64: dts: qcom: ipq5018: Add Super-Speed UNIPHY to USB node George Moussalem via B4 Relay
2026-08-25 12:37 ` [PATCH v3 12/12] arm64: dts: qcom: ipq5018: Enable USB Super-Speed PHY George Moussalem via B4 Relay
2026-08-27 19:06 ` Stanislaw Pal [this message]
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20260827190647.807193-1-kuncy7@gmail.com \
--to=kuncy7@gmail.com \
--cc=andersson@kernel.org \
--cc=conor+dt@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=george.moussalem@outlook.com \
--cc=gregkh@linuxfoundation.org \
--cc=konradybcio@kernel.org \
--cc=krzk+dt@kernel.org \
--cc=linux-arm-msm@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-phy@lists.infradead.org \
--cc=linux-usb@vger.kernel.org \
--cc=mani@kernel.org \
--cc=neil.armstrong@linaro.org \
--cc=p.zabel@pengutronix.de \
--cc=praveenkumar.i@oss.qualcomm.com \
--cc=quic_nsekar@quicinc.com \
--cc=quic_wcheng@quicinc.com \
--cc=robh@kernel.org \
--cc=varadarajan.narayanan@oss.qualcomm.com \
--cc=vkoul@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox
all inboxes | Powered by JetHome®