From: Janani Sunil <janani.sunil@analog.com>
To: "Nuno Sá" <nuno.sa@analog.com>,
"Michael Hennerich" <Michael.Hennerich@analog.com>,
"Jonathan Cameron" <jic23@kernel.org>,
"David Lechner" <dlechner@baylibre.com>,
"Andy Shevchenko" <andy@kernel.org>,
"Rob Herring" <robh@kernel.org>,
"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
"Conor Dooley" <conor+dt@kernel.org>,
"Olivier Moysan" <olivier.moysan@foss.st.com>,
"Philipp Zabel" <p.zabel@pengutronix.de>,
"Linus Walleij" <linusw@kernel.org>,
"Bartosz Golaszewski" <brgl@kernel.org>,
"Jonathan Corbet" <corbet@lwn.net>,
"Shuah Khan" <skhan@linuxfoundation.org>,
"Michael Walle" <mwalle@kernel.org>
Cc: linux@analog.com, linux-iio@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-gpio@vger.kernel.org, linux-doc@vger.kernel.org,
jananisunil.dev@gmail.com,
"Uwe Kleine-König" <u.kleine-koenig@baylibre.com>,
"Janani Sunil" <janani.sunil@analog.com>
Subject: [PATCH v5 02/20] dt-bindings: iio: adc: Add AD7768
Date: Fri, 28 Aug 2026 17:30:25 +0200 [thread overview]
Message-ID: <20260828-ad7768-driver-v5-2-e33ca6f841a2@analog.com> (raw)
In-Reply-To: <20260828-ad7768-driver-v5-0-e33ca6f841a2@analog.com>
Devicetree Bindings for AD7768-4 (4 channel) and AD7768 (8 channel)
simultaneous sampling ADCs.
Signed-off-by: Janani Sunil <janani.sunil@analog.com>
---
.../devicetree/bindings/iio/adc/adi,ad7768.yaml | 270 +++++++++++++++++++++
MAINTAINERS | 7 +
2 files changed, 277 insertions(+)
diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad7768.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad7768.yaml
new file mode 100644
index 000000000000..d8e489fa1f6f
--- /dev/null
+++ b/Documentation/devicetree/bindings/iio/adc/adi,ad7768.yaml
@@ -0,0 +1,270 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/iio/adc/adi,ad7768.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Analog Devices AD7768 and AD7768-4 ADC
+
+maintainers:
+ - Janani Sunil <janani.sunil@analog.com>
+
+description: |
+ The AD7768 is an 8-channel, 24-bit simultaneous sampling ADC with configurable
+ power and performance modes. The AD7768-4 is a 4-channel version.
+
+ This binding covers SPI mode only (register access via SPI). Pin control mode,
+ where configuration is set via hardware pins rather than SPI registers, is not
+ supported.
+
+ The io-backend represents the high-speed data output interface, consuming the
+ DOUTx data lines, DCLK (data clock), and DRDY (data ready) signals.
+
+ Datasheet at:
+ https://www.analog.com/media/en/technical-documentation/data-sheets/ad7768-ad7768-4.pdf
+
+ HDL reference design:
+ https://github.com/analogdevicesinc/hdl/tree/main/projects/ad7768evb
+
+properties:
+ compatible:
+ enum:
+ - adi,ad7768
+ - adi,ad7768-4
+
+ reg:
+ maxItems: 1
+
+ clocks:
+ maxItems: 1
+
+ clock-names:
+ description:
+ Describes the type of master clock (MCLK) attached to the XTAL1 and
+ XTAL2/MCLK pins. A CMOS clock is supplied on the XTAL2/MCLK pin, a
+ crystal oscillator is connected between the XTAL1 and XTAL2 pins, and an
+ LVDS differential clock is supplied on the XTAL1/XTAL2 pin pair. CMOS and
+ LVDS clocks must operate from 1.15 MHz to 34 MHz. Crystals must operate
+ from 8 MHz to 34 MHz.
+ enum:
+ - mclk
+ - xtal
+ - lvds
+
+ avdd1-supply:
+ description:
+ Analog supply. Its voltage is used to derive the supply-dependent VCM
+ output level, so it must be a regulator that can report its voltage.
+
+ avss-supply:
+ description:
+ Negative analog supply. If omitted, AVSS is assumed to be at system
+ ground.
+
+ avdd2-supply: true
+
+ iovdd-supply: true
+
+ ref1p-supply: true
+
+ ref1n-supply:
+ description:
+ Negative reference input supply for REF1. If omitted, REF1- is assumed
+ to be connected to ground.
+
+ ref2p-supply: true
+
+ ref2n-supply:
+ description:
+ Negative reference input supply for REF2. If omitted, REF2- is assumed
+ to be connected to ground.
+
+ reset-gpios:
+ maxItems: 1
+ description: GPIO connected to the active-low RESET pin
+
+ start-gpios:
+ maxItems: 1
+ description:
+ GPIO connected to the START pin. An active-low pulse on this pin
+ synchronizes the device to other AD7768 devices. When not used, this
+ pin must be tied to a logic high level through a pull-up resistor.
+ When used, SYNC_OUT must be wired back to SYNC_IN on all devices in
+ the synchronization chain.
+
+ sync-in-gpios:
+ maxItems: 1
+ description:
+ GPIO connected to the SYNC_IN pin. Receives the synchronization pulse
+ generated on SYNC_OUT in response to a START pulse. Must be synchronous
+ to the MCLK clock domain. In multi-device or daisy-chained systems,
+ two successive synchronization pulses must be applied to guarantee all
+ ADCs are synchronized.
+
+ gpio-controller: true
+
+ '#gpio-cells':
+ const: 2
+
+ adi,data-lines-number:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ enum: [1, 2, 4, 8]
+ description:
+ Number of DOUTx lines used for the high-speed data output interface
+ (distinct from the SPI control interface). AD7768 supports 1, 2, or 8
+ lines; AD7768-4 supports 1 or 4 lines. Defaults to the maximum number
+ of lines for the selected variant if omitted.
+
+ regulators:
+ type: object
+ description: Container for the on-chip VCM regulator.
+ additionalProperties: false
+
+ properties:
+ vcm-output:
+ type: object
+ description:
+ Buffered common-mode voltage output on the VCM pin. Use
+ regulator-always-on when no consumer node references this output.
+ Channel 0 must be present and enabled while VCM is used, since
+ putting channel 0 in standby disables the VCM output.
+ $ref: /schemas/regulator/regulator.yaml#
+ unevaluatedProperties: false
+
+ io-backends:
+ maxItems: 1
+
+ '#address-cells':
+ const: 1
+
+ '#size-cells':
+ const: 0
+
+patternProperties:
+ "^channel@[0-7]$":
+ type: object
+ description:
+ Represents the external channels which are connected to the device.
+ AD7768 supports channels 0-7, AD7768-4 supports channels 0-3.
+
+ properties:
+ reg:
+ minimum: 0
+ maximum: 7
+ description: The channel number
+
+ adi,prechargebuf-pos-enable:
+ type: boolean
+ description: Enable positive input precharge buffer
+
+ adi,prechargebuf-neg-enable:
+ type: boolean
+ description: Enable negative input precharge buffer
+
+ adi,refbuf-pos-enable:
+ type: boolean
+ description: Enable positive reference buffer
+
+ adi,refbuf-neg-enable:
+ type: boolean
+ description: Enable negative reference buffer
+
+ required:
+ - reg
+
+ additionalProperties: false
+
+required:
+ - compatible
+ - reg
+ - clocks
+ - clock-names
+ - avdd1-supply
+ - avdd2-supply
+ - iovdd-supply
+ - ref1p-supply
+ - ref2p-supply
+ - io-backends
+
+allOf:
+ - $ref: /schemas/spi/spi-peripheral-props.yaml#
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: adi,ad7768-4
+ then:
+ properties:
+ adi,data-lines-number:
+ enum: [1, 4]
+ patternProperties:
+ "^channel@[0-3]$":
+ properties:
+ reg:
+ maximum: 3
+ "^channel@[4-7]$": false
+ else:
+ properties:
+ adi,data-lines-number:
+ enum: [1, 2, 8]
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/gpio/gpio.h>
+
+ spi {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ adc@0 {
+ compatible = "adi,ad7768";
+ reg = <0>;
+ spi-max-frequency = <1000000>;
+
+ avdd1-supply = <&avdd1_regulator>;
+ avss-supply = <&avss_regulator>;
+ avdd2-supply = <&avdd2_regulator>;
+ iovdd-supply = <&iovdd_regulator>;
+ ref1p-supply = <&ref1p_regulator>;
+ ref1n-supply = <&ref1n_regulator>;
+ ref2p-supply = <&ref2p_regulator>;
+ ref2n-supply = <&ref2n_regulator>;
+ reset-gpios = <&gpio0 86 GPIO_ACTIVE_LOW>;
+
+ clocks = <&ad7768_mclk>;
+ clock-names = "mclk";
+
+ adi,data-lines-number = <8>;
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ io-backends = <&iio_backend>;
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ channel@0 {
+ reg = <0>;
+ adi,prechargebuf-pos-enable;
+ adi,refbuf-pos-enable;
+ };
+
+ channel@1 {
+ reg = <1>;
+ adi,prechargebuf-pos-enable;
+ adi,prechargebuf-neg-enable;
+ adi,refbuf-pos-enable;
+ adi,refbuf-neg-enable;
+ };
+
+ channel@7 {
+ reg = <7>;
+ adi,prechargebuf-pos-enable;
+ adi,refbuf-pos-enable;
+ };
+ };
+ };
+
+...
diff --git a/MAINTAINERS b/MAINTAINERS
index 2b1ec46c5919..d667a0411f28 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1633,6 +1633,13 @@ F: Documentation/devicetree/bindings/iio/adc/adi,ad7768-1.yaml
F: drivers/iio/adc/ad7768-1.c
F: include/dt-bindings/iio/adc/adi,ad7768-1.h
+ANALOG DEVICES INC AD7768 DRIVER
+M: Janani Sunil <janani.sunil@analog.com>
+L: linux-iio@vger.kernel.org
+S: Supported
+W: https://ez.analog.com/linux-software-drivers
+F: Documentation/devicetree/bindings/iio/adc/adi,ad7768.yaml
+
ANALOG DEVICES INC AD7780 DRIVER
M: Michael Hennerich <Michael.Hennerich@analog.com>
M: Renato Lui Geh <renatogeh@gmail.com>
--
2.43.0
next prev parent reply other threads:[~2026-08-28 15:31 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-08-28 15:30 [PATCH v5 00/20] iio: adc: Add AD7768/AD7768-4 ADC driver support Janani Sunil
2026-08-28 15:30 ` [PATCH v5 01/20] iio: adc: adi-axi-adc: Initialize state mutex Janani Sunil
2026-08-28 15:30 ` Janani Sunil [this message]
2026-08-28 15:30 ` [PATCH v5 03/20] iio: backend: Add support for CRC Janani Sunil
2026-08-28 15:30 ` [PATCH v5 04/20] iio: adc: adi-axi-adc: " Janani Sunil
2026-08-28 15:30 ` [PATCH v5 05/20] iio: adc: Add AD7768 and AD7768-4 core support Janani Sunil
2026-08-28 15:30 ` [PATCH v5 06/20] iio: adc: ad7768: Validate master clock rate Janani Sunil
2026-08-28 15:30 ` [PATCH v5 07/20] iio: adc: ad7768: Add power mode helper Janani Sunil
2026-08-28 15:30 ` [PATCH v5 08/20] iio: adc: ad7768: Derive output data rates Janani Sunil
2026-08-28 15:30 ` [PATCH v5 09/20] iio: adc: ad7768: Configure channel sampling profiles Janani Sunil
2026-08-28 15:30 ` [PATCH v5 10/20] iio: adc: ad7768: Add sampling frequency controls Janani Sunil
2026-08-28 15:30 ` [PATCH v5 11/20] iio: adc: ad7768: Add per-channel filter controls Janani Sunil
2026-08-28 15:30 ` [PATCH v5 12/20] iio: adc: ad7768: Wait for digital filters to settle Janani Sunil
2026-08-28 15:30 ` [PATCH v5 13/20] iio: adc: ad7768: Add calibration controls Janani Sunil
2026-08-28 15:30 ` [PATCH v5 14/20] iio: adc: ad7768: Add per-channel conversion delay Janani Sunil
2026-08-28 15:30 ` [PATCH v5 15/20] iio: adc: ad7768: Add VCM regulator support Janani Sunil
2026-08-28 15:30 ` [PATCH v5 16/20] iio: adc: ad7768: Register GPIO auxiliary device Janani Sunil
2026-08-28 15:30 ` [PATCH v5 17/20] gpio: regmap: Use regmap_test_bits() for single bit reads Janani Sunil
2026-08-28 15:30 ` [PATCH v5 18/20] gpio: regmap: Add optional runtime PM support Janani Sunil
2026-08-28 15:30 ` [PATCH v5 19/20] gpio: ad7768: Add AD7768 GPIO auxiliary driver Janani Sunil
2026-08-28 15:30 ` [PATCH v5 20/20] Documentation: iio: Add AD7768 Documentation Janani Sunil
2026-08-29 18:19 ` [PATCH v5 00/20] iio: adc: Add AD7768/AD7768-4 ADC driver support Jonathan Cameron
2026-08-30 7:12 ` Andy Shevchenko
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