From: Krzysztof Kozlowski <krzk@kernel.org>
To: Vinayak Katoch <vinayak.katoch@oss.qualcomm.com>
Cc: Srinivas Kandagatla <srini@kernel.org>,
Ekansh Gupta <ekansh.gupta@oss.qualcomm.com>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Arnd Bergmann <arnd@arndb.de>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Bjorn Andersson <andersson@kernel.org>,
Konrad Dybcio <konradybcio@kernel.org>,
Bharath Kumar <bkumar@qti.qualcomm.com>,
Chenna Kesava Raju <chennak@qti.qualcomm.com>,
linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH 1/6] dt-bindings: misc: fastrpc: Add memory-region property for context bank
Date: Sun, 30 Aug 2026 11:49:40 +0200 [thread overview]
Message-ID: <20260830-nondescript-blue-jackdaw-a95a3a@quoll> (raw)
In-Reply-To: <20260826-extended-mapping-v1-1-d046c1cb9a9f@oss.qualcomm.com>
On Wed, Aug 26, 2026 at 07:15:43PM +0530, Vinayak Katoch wrote:
> Add an optional memory-region property to the context bank node schema.
> The driver uses its presence to identify a context bank as dedicated for
> extended IOVA mapping and programs the SMMU with an iommu-addresses
> range to push allocations into the wider address space.
I hope you are not solving in a third or fourth way the same problem
that Iris/Venus, QDA and one more block have.
>
> Relax #address-cells to enum: [1, 2] and #size-cells to enum: [0, 2] to
> allow platforms that require 64-bit values in iommu-addresses to pass
> binding validation.
>
> Signed-off-by: Vinayak Katoch <vinayak.katoch@oss.qualcomm.com>
> ---
> Documentation/devicetree/bindings/misc/qcom,fastrpc.yaml | 12 ++++++++++--
> 1 file changed, 10 insertions(+), 2 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/misc/qcom,fastrpc.yaml b/Documentation/devicetree/bindings/misc/qcom,fastrpc.yaml
> index e945c8ba75e3..f9830ef37814 100644
> --- a/Documentation/devicetree/bindings/misc/qcom,fastrpc.yaml
> +++ b/Documentation/devicetree/bindings/misc/qcom,fastrpc.yaml
> @@ -73,10 +73,10 @@ properties:
> $ref: /schemas/types.yaml#/definitions/uint32-array
>
> "#address-cells":
> - const: 1
> + enum: [1, 2]
>
> "#size-cells":
> - const: 0
> + enum: [0, 2]
>
> patternProperties:
> "(compute-)?cb@[0-9]*$":
> @@ -98,6 +98,14 @@ patternProperties:
> minItems: 1
> maxItems: 10
>
> + memory-region:
> + maxItems: 1
> + description:
> + Phandle to a reserved-memory node whose iommu-addresses property
> + blocks the lower IOVA range, forcing allocations into the extended
> + address space. Its presence marks this context bank as an extended
> + mapping bank.
So far looks the same as:
https://lore.kernel.org/all/20260807-iris_iova_600mb_fix-v1-4-3996f67e33f9@oss.qualcomm.com/
If it is not the same problem, then please explain. Otherwise wait for
resolution of Iris patchset.
Best regards,
Krzysztof
next prev parent reply other threads:[~2026-08-30 9:49 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-08-26 13:45 [PATCH 0/6] misc: fastrpc: Add extended IOVA mapping support Vinayak Katoch
2026-08-26 13:45 ` [PATCH 1/6] dt-bindings: misc: fastrpc: Add memory-region property for context bank Vinayak Katoch
2026-08-30 9:49 ` Krzysztof Kozlowski [this message]
2026-08-26 13:45 ` [PATCH 2/6] misc: fastrpc: Handle multi-cell reg in context bank probe Vinayak Katoch
2026-08-26 13:45 ` [PATCH 3/6] arm64: dts: qcom: kaanapali: Add CDSP FastRPC extended context bank Vinayak Katoch
2026-08-30 9:46 ` Krzysztof Kozlowski
2026-08-26 13:45 ` [PATCH 4/6] arm64: dts: qcom: glymur: " Vinayak Katoch
2026-08-26 13:45 ` [PATCH 5/6] misc: fastrpc: Add extended context bank support Vinayak Katoch
2026-08-26 13:45 ` [PATCH 6/6] misc: fastrpc: Add UAPI flags for extended IOVA mapping Vinayak Katoch
2026-08-30 9:50 ` [PATCH 0/6] misc: fastrpc: Add extended IOVA mapping support Krzysztof Kozlowski
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