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[129.46.232.65]) by smtp.gmail.com with ESMTPSA id af79cd13be357-93917236b86sm735974285a.13.2026.08.31.01.19.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 31 Aug 2026 01:19:29 -0700 (PDT) From: Yongxing Mou Date: Mon, 31 Aug 2026 16:17:38 +0800 Subject: [PATCH v6 21/29] drm/msm/dpu: use stream_id to select MST interfaces Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260831-msm-dp-mst-v6-21-c91d35d6fb9e@oss.qualcomm.com> References: <20260831-msm-dp-mst-v6-0-c91d35d6fb9e@oss.qualcomm.com> In-Reply-To: <20260831-msm-dp-mst-v6-0-c91d35d6fb9e@oss.qualcomm.com> To: Rob Clark , Dmitry Baryshkov , Abhinav Kumar , Sean Paul , Marijn Suijten , David Airlie , Simona Vetter , Jessica Zhang , Jessica Zhang Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org, Yongxing Mou , Abhinav Kumar X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1788164246; l=2465; i=yongxing.mou@oss.qualcomm.com; s=20250910; h=from:subject:message-id; bh=82JlyjBSKXtodVZFszzb+1Hgv/eaaH0tUVHNO5mb/CY=; b=x/s94i0DeCe3YCVrBsDph3VVcytKBs9B4N168dh61yZiWSQYSPFF6vUmEMwi5j2EF6ftde2ue /EtHpwp9m+RA/NZc5TUdReuV4pTaY1MbGQv3Omr6axIuDc6CT8fMyr7 X-Developer-Key: i=yongxing.mou@oss.qualcomm.com; a=ed25519; pk=rAy5J1eP+V7OXqH5FJ7ngMCtUrnHhut30ZTldOj52UM= X-Proofpoint-ORIG-GUID: 5GMd_GMh75nblk1LVWIoDw890aBgg1Mi X-Proofpoint-GUID: 5GMd_GMh75nblk1LVWIoDw890aBgg1Mi X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwODMxMDA3MCBTYWx0ZWRfX9Qi2h1ndQzl5 IEScssbxwmgmH6xa8F5Hp2/leHX5Mt8mr5iLAERKsLMMf4vD6IwirEPrqS0MnIzkvALA3yxXpEC nIiywezlNZvLCn5SJyCZBZ1rQ4rtHFs9TmzZKbz7ibLNK58ePa/oFvOhFNkuv6W4LBpnRXhl68e THilxrC23+c7qdGe4Wmco9ZDZfVQ232aLFH6w5w0E5J5YMQcRUdwt0FpRBf4NR9QACQjLOk3mYn DQLoV5sLQl/uwCNQjyZpcBEClAXyeCBPVJmYBQrZgl7d9nqnA0M8c21zlbs4nl3kTkk81JUOCvE qesa9NyVjEoX0wnJl3rbctPzyfJ4bKj2blDRYJIUnmb88Kjec/SXalLV9Tnsyx6PCh/cJTB7Zhk ZkR/yN8O9IezT30yoJe9jHO+ukUEudhjO//XLfOgsSSvd7d2MSRVnTP/f1ycqXPudUj9T6Z+CrV C3vPe/XIEqtmg/xkBZw== X-Authority-Analysis: v=2.4 cv=S8/pBosP c=1 sm=1 tr=0 ts=6a953912 cx=c_pps a=hnmNkyzTK/kJ09Xio7VxxA==:117 a=C3Dk8TwHQYyIj7nOf9RCJw==:17 a=IkcTkHD0fZMA:10 a=Sv0fKeRqtYgA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=yx91gb_oNiZeI1HMLzn7:22 a=COk6AnOGAAAA:8 a=EUspDBNiAAAA:8 a=m4XVQ0OAQ8bppu2UB-MA:9 a=QEXdDO2ut3YA:10 a=PEH46H7Ffwr30OY-TuGO:22 a=TjNXssC_j7lpFel5tvFf:22 X-Proofpoint-Spam-Info: AW1haW4tMjYwODMxMDA3MCBTYWx0ZWRfXz+lU9HUZjud7 wRQh9Nkf30HTl6mWsdN6H/Illb96VKhSWDgJoXqmnaDNnaRHxwW9KzwFGjpoTPkSA0QT9IHJWG4 wR6H7zhu8ttnTbgs5Lm0r2O5qcjUaHM= X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-08-31_03,2026-08-27_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 impostorscore=0 clxscore=1015 priorityscore=1501 suspectscore=0 bulkscore=0 malwarescore=0 spamscore=0 lowpriorityscore=0 phishscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2608310070 For MST, multiple streams can share the same DP controller, making (controller_id, intf_type) insufficient to uniquely identify a DPU interface. Add stream_id to msm_display_info and use it to select the matching interface for a stream. For DSI, eDP and SST configurations, stream_id remains zero and behavior is unchanged. Signed-off-by: Abhinav Kumar Signed-off-by: Yongxing Mou --- drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 7 ++++--- drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h | 2 ++ 2 files changed, 6 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c index 91cbb0ca521b..004d5fc460a8 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c @@ -1439,17 +1439,18 @@ static struct dpu_hw_intf *dpu_encoder_get_intf(const struct dpu_mdss_cfg *catal struct dpu_rm *dpu_rm, struct msm_display_info *disp_info, int index) { - int i = 0; + int i = 0, cnt = 0; u32 controller_id = disp_info->h_tile_instance[index]; + int stream_id = disp_info->stream_id; if (disp_info->intf_type == INTF_WB) return NULL; for (i = 0; i < catalog->intf_count; i++) { if (catalog->intf[i].type == disp_info->intf_type - && catalog->intf[i].controller_id == controller_id) { + && catalog->intf[i].controller_id == controller_id + && cnt++ == stream_id) return dpu_rm_get_intf(dpu_rm, catalog->intf[i].id); - } } return NULL; diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h index 4942097e7613..9972e209bd58 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h @@ -28,6 +28,7 @@ * @h_tile_instance: Controller instance used per tile. Number of elements is * based on num_of_h_tiles * @is_cmd_mode Boolean to indicate if the CMD mode is requested + * @stream_id stream id for which the interface needs to be acquired * @vsync_source: Source of the TE signal for DSI CMD devices */ struct msm_display_info { @@ -35,6 +36,7 @@ struct msm_display_info { uint32_t num_of_h_tiles; uint32_t h_tile_instance[MAX_H_TILES_PER_DISPLAY]; bool is_cmd_mode; + int stream_id; enum dpu_vsync_source vsync_source; }; -- 2.43.0