From: Maxime Chevallier <maxime.chevallier@bootlin.com>
To: Andrew Lunn <andrew+netdev@lunn.ch>,
Jakub Kicinski <kuba@kernel.org>,
davem@davemloft.net, Eric Dumazet <edumazet@google.com>,
Paolo Abeni <pabeni@redhat.com>, Simon Horman <horms@kernel.org>,
Maxime Coquelin <mcoquelin.stm32@gmail.com>,
Alexandre Torgue <alexandre.torgue@foss.st.com>,
Russell King <linux@armlinux.org.uk>,
Heiner Kallweit <hkallweit1@gmail.com>, Yao Zi <me@ziyao.cc>,
Frank <Frank.Sae@motor-comm.com>
Cc: "Maxime Chevallier" <maxime.chevallier@bootlin.com>,
thomas.petazzoni@bootlin.com,
"Alexis Lothoré" <alexis.lothore@bootlin.com>,
netdev@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-stm32@st-md-mailman.stormreply.com
Subject: [PATCH net-next 3/3] net: phy: motorcomm: Enable analog frontend on YT8531S
Date: Mon, 31 Aug 2026 09:37:45 +0200 [thread overview]
Message-ID: <20260831073747.361482-4-maxime.chevallier@bootlin.com> (raw)
In-Reply-To: <20260831073747.361482-1-maxime.chevallier@bootlin.com>
The YT6801 PCIe NIC includes the dwmac-motorcomm IP for the MAC part, as
well as a YT8531S PHY, configured in GMII mode.
It seems this PHY requires the Analog Front-end (AFE) DAC clock to be
enabled for link to reliably establish, otherwise the link just doesn't
come up.
Let's enable it at config_init().
This logic has been extracted from the vendor driver provided by
Motorcomm.
It's really unclear if this is specific to the integrated version of
that PHY, and how this potentially interacts with the fiber mode this
PHY supports, so this configuration is only enabled when the interface
is GMII, i.e. the PHY is integrated.
With this, the PHY reliably establishes link and the YT6801 PCIe card
becomes fully functional.
Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com>
---
drivers/net/phy/motorcomm.c | 14 +++++++++++++-
1 file changed, 13 insertions(+), 1 deletion(-)
diff --git a/drivers/net/phy/motorcomm.c b/drivers/net/phy/motorcomm.c
index 36c229460a77..90a4f86f2758 100644
--- a/drivers/net/phy/motorcomm.c
+++ b/drivers/net/phy/motorcomm.c
@@ -144,6 +144,11 @@
#define YT8521_CLOCK_GATING_REG 0xC
#define YT8521_CGR_RX_CLK_EN BIT(12)
+/* Analog front-end control register 3 */
+#define YT8531S_EXT_AFE_CTRL3 0x12
+/* Analog front-end DAC clock enable */
+#define YT8531S_AFE_CTRL3_CLKDAC_AON BIT(13)
+
#define YT8521_EXTREG_SLEEP_CONTROL1_REG 0x27
#define YT8521_ESC1R_SLEEP_SW BIT(15)
#define YT8521_ESC1R_PLLON_SLP BIT(14)
@@ -1740,8 +1745,15 @@ static int yt8531s_config_init(struct phy_device *phydev)
if (ret)
goto err_restore_page;
- if (phy_interface_is_rgmii(phydev))
+ if (phy_interface_is_rgmii(phydev)) {
ret = yt8531_set_ds(phydev);
+ if (ret)
+ goto err_restore_page;
+ }
+
+ if (phydev->interface == PHY_INTERFACE_MODE_GMII)
+ ret = ytphy_modify_ext(phydev, YT8531S_EXT_AFE_CTRL3,
+ 0, YT8531S_AFE_CTRL3_CLKDAC_AON);
err_restore_page:
return phy_restore_page(phydev, old_page, ret);
--
2.55.0
next prev parent reply other threads:[~2026-08-31 7:38 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-08-31 7:37 [PATCH net-next 0/3] net: phy: motorcomm: Enable analog frontend DAC on yt8531S Maxime Chevallier
2026-08-31 7:37 ` [PATCH net-next 1/3] net: phy: motorcomm: Split yt8521_config_init() page management Maxime Chevallier
2026-08-31 7:37 ` [PATCH net-next 2/3] net: phy: motorcomm: Add a dedicated .config_init for YT8531S Maxime Chevallier
2026-08-31 7:37 ` Maxime Chevallier [this message]
2026-09-01 13:59 ` [PATCH net-next 3/3] net: phy: motorcomm: Enable analog frontend on YT8531S Paolo Abeni
2026-09-01 14:21 ` Maxime Chevallier
2026-09-01 16:56 ` Yao Zi
2026-09-05 7:16 ` Maxime Chevallier
2026-09-01 16:33 ` [PATCH net-next 0/3] net: phy: motorcomm: Enable analog frontend DAC on yt8531S Yao Zi
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