From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 87ECE47DD75; Tue, 1 Sep 2026 12:15:43 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788264943; cv=none; b=KU2kSClnv3arbqZBa3nvxCNCnvGsgICj6D2gYnJd3lwZWlH6t962Q4zARJ2kzS8MhQWiqGsWZ9qPviPunjfwPIvifYsS4lBDt6+0SrOVTd0kqQLIZ/iM/UDDrwvf8LEH0YLBYpYCfePbcf1zxL1/K9bynZQnRwDYJrea5DSduUc= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788264943; c=relaxed/simple; bh=cIvLqefYkfowuS19wIJrn53hN6HgSNJJktFF9xTZUcs=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=joUUG4A0jOe+xyFUWN1z/yTXX3Skg0AoraofCzJdn0uLksT3DzBzojHxgwV6nemFdW6JsfANwXJr4hGtPmV62ryJnDzbm66b+6sPbeNvUuo3VbEbQq2XeX7q+kjOH/N2ByQqlqODKPrblkg9tzx5Cd5PnMIfp3T2btLpekkd5tQ= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=i4vyZ68i; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="i4vyZ68i" Received: by smtp.kernel.org (Postfix) with ESMTPS id 45773C4DDE4; Tue, 1 Sep 2026 12:15:43 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1788264943; bh=cIvLqefYkfowuS19wIJrn53hN6HgSNJJktFF9xTZUcs=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=i4vyZ68i6K6dq/Qg5AnYcSCJkRoYCDIrFRVuI4lrvQArXJyT5hCZHvziRsPrIQYC2 3v0FjJ+l0cJpfQBVrNbcvFlc3uLJ+kM8KnVkOEJusKZZZRoXC7wXNFXCigBazMLhRL EJSFMr7IddNnO6ZsDegEwwdIsm1o7J1NJ31Yn+DvSjLx47XBqjQNj3QcpPk//3WOPo /7wcbgi5nqsVXLqD3bOeBXVOyEjTDuyqchGPLYsgOZFTJN+zqw90gK8lrNeH6OaTMB Pcue7QkaCM2fo8hnp6UV3mt1laxqbSTrLxPoeJwPvvZJt2AwMa96p3GLUr8cz4vR1S 8a8pJxWiaSVWw== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 317AEC624D5; Tue, 1 Sep 2026 12:15:43 +0000 (UTC) From: Colin Huang via B4 Relay Date: Tue, 01 Sep 2026 20:15:25 +0800 Subject: [PATCH v7 10/11] ARM: dts: aspeed: anacapa: Simplify leakage GPIO line names Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260901-anacapa-devlop-phase-devicetree-v7-10-0bd71d2e0105@gmail.com> References: <20260901-anacapa-devlop-phase-devicetree-v7-0-0bd71d2e0105@gmail.com> In-Reply-To: <20260901-anacapa-devlop-phase-devicetree-v7-0-0bd71d2e0105@gmail.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Joel Stanley , Andrew Jeffery , Ryan Chen , Billy Tsai Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-aspeed@lists.ozlabs.org, linux-kernel@vger.kernel.org, colin.huang2@amd.com, Colin Huang , Rex Fu X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1788264931; l=2443; i=u8813345@gmail.com; s=20260202; h=from:subject:message-id; bh=YKBNINtOmWSGavUDq0qTIJTMioCf/gtdbVeSDBfGxzI=; b=VqWdPw74CzDtr7w5J5bQhwjN81mA68FCTsKukDjMlQriNie2R4sfFsvSJgZwpQu2/YWzRtCR0 p5eLvtgFzjwDAAD5j2F6m9S0Ilwdcy9agJs6LJbCzVlxztHA5cCAjZM X-Developer-Key: i=u8813345@gmail.com; a=ed25519; pk=Zlg0WqpCw4qbswOqamTBTXIchwR/3SnYZpy7rjaGMdQ= X-Endpoint-Received: by B4 Relay for u8813345@gmail.com/20260202 with auth_id=761 X-Original-From: Colin Huang Reply-To: u8813345@gmail.com From: Rex Fu Remove the board location suffixes from the leakage present GPIO line names. The channel number is enough to identify each leakage present signal. Signed-off-by: Rex Fu --- .../aspeed/aspeed-bmc-facebook-anacapa-dvt.dtsi | 28 +++++++++++----------- 1 file changed, 14 insertions(+), 14 deletions(-) diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-anacapa-dvt.dtsi b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-anacapa-dvt.dtsi index cb4c41bd8b8f..046a70f3c71f 100644 --- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-anacapa-dvt.dtsi +++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-anacapa-dvt.dtsi @@ -109,32 +109,32 @@ &sgpiom0 { "", "", /* B0-B7 line 16-31 */ - "Channel0_leakage_EAM3", "FM_CPU_FPGA_JTAG_MUX_SEL", - "Channel1_leakage_EAM0", "FM_SCM_JTAG_MUX_SEL", - "Channel2_leakage_Manifold1", "FM_BRIDGE_JTAG_MUX_SEL", - "Channel5_leakage_present_EAM1", "FM_CPU0_NMI_SYNC_FLOOD_N", - "Channel4_leakage_Manifold2", "BMC_AINIC0_WP_R2_L", - "Channel5_leakage_EAM1", "BMC_AINIC1_WP_R2_L", - "Channel6_leakage_CPU_DIMM", "CPLD_BUF_R_AGPIO330", - "Channel7_leakage_EAM2", "CPLD_BUF_R_AGPIO331", + "Channel0_leakage", "FM_CPU_FPGA_JTAG_MUX_SEL", + "Channel1_leakage", "FM_SCM_JTAG_MUX_SEL", + "Channel2_leakage", "FM_BRIDGE_JTAG_MUX_SEL", + "Channel5_leakage_present", "FM_CPU0_NMI_SYNC_FLOOD_N", + "Channel4_leakage", "BMC_AINIC0_WP_R2_L", + "Channel5_leakage", "BMC_AINIC1_WP_R2_L", + "Channel6_leakage", "CPLD_BUF_R_AGPIO330", + "Channel7_leakage", "CPLD_BUF_R_AGPIO331", /* C0-C7 line 32-47 */ "RSVD_RMC_GPIO3", "RTM_MUX_L", "LEAK_DETECT_RMC_N", "RTM_MUX_R", "HDR_P0_NMI_BTN_BUF_R_N", "FPGA_JTAG_SCM_DBREQ_N", - "Channel6_leakage_present_CPU_DIMM", "whdt_sel", + "Channel6_leakage_present", "whdt_sel", "R_EAM0_NIC_CBL_PRSNT_L", "JTAG_CPLD_TRST_R_N", "R_EAM1_NIC_CBL_PRSNT_L", "", "L_EAM0_NIC_CBL_PRSNT_L", "", "L_EAM1_NIC_CBL_PRSNT_L", "", /* D0-D7 line 48-63 */ - "Channel0_leakage_present_EAM3", "", - "Channel1_leakage_present_EAM0", "", - "Channel2_leakage_present_Manifold1", "", - "Channel4_leakage_present_Manifold2", "", + "Channel0_leakage_present", "", + "Channel1_leakage_present", "", + "Channel2_leakage_present", "", + "Channel4_leakage_present", "", "AMC_BRD_PRSNT_CPLD_L", "", - "Channel7_leakage_present_EAM2", "", + "Channel7_leakage_present", "", "", "", "", "", -- 2.34.1