From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0D1D8282F2C for ; Tue, 1 Sep 2026 06:04:54 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.180.131 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788242696; cv=none; b=n+H98cio56LXbHKeJvhsamSDue6ooVZNsnXTVgw4p19vkXYvUWxvLmjGdRryk3vcyprfbCtjUmho/ljrTYKfrBt1JWQctImsh88Mfn1Kz6LyEyR40ujghWSbxM8RDvREVB7dNP0PTjoZeGkCGp2ig/HNIEIuylnL2mmG+u7c8hE= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788242696; c=relaxed/simple; bh=BY7Re9ZAKiJC1aF4jDGHOuCzEmdjn5geHIdnW6RHsU0=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=N//wkb5Rz65S6sDW0ypqSz0B3LE/ZRmsN+Cv5im28/XKH9G9l9vLN0VUAALuhU3WdjjJ4syrNNmCIBJDPL3JnD8XI5udBkEdZE/MEGDj+CHnrbGsJMtt6pB+D5M1lhZQGKYryyvDDT2Zu2URaSml6ZFujLaw5zkWPCwpW3Akj54= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=Ss48hIF3; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b=TMpRwa7Z; arc=none smtp.client-ip=205.220.180.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="Ss48hIF3"; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b="TMpRwa7Z" Received: from pps.filterd (m0279868.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 6812mYdQ1132649 for ; Tue, 1 Sep 2026 06:04:54 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= +/werBemlVnDaMAXAHg5cgVtJvw6t+Wx76nl38H1JEI=; b=Ss48hIF3RV/82DNx n1aRXf+ChRuRQBCLW1drWlN3U4sofG+Xm978EOIryFrFJGwGPIT+9U1ACuLWO08j nc9Qz22280BP8pMSKCX8oAnCMdJxBn1ZJ9YjA3yM67o+9ZI81mMK5JLVgUCO+IKQ /6gGigLhgqxh2yy8ROmM5OiDEnYMWUumC2ki9n1Rpdtk3C63qTJREzaEuSoCMdEI DgWGx16HOeTkyB/ZMRu6hYCVvcL1OZ/BptfeGVppa0z1t4l1Ak5tyeb6qLmK5m6p BRGAJAJQZTt9KyniHxQ3XUpIjk6eh6nnkcYIi0IUy0GwlNXX8NAZXL+kodG3r/f7 fluNOg== Received: from mail-pj1-f72.google.com (mail-pj1-f72.google.com [209.85.216.72]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4gdp8frmwb-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Tue, 01 Sep 2026 06:04:53 +0000 (GMT) Received: by mail-pj1-f72.google.com with SMTP id 98e67ed59e1d1-398e1f7d1a5so2993086a91.0 for ; Mon, 31 Aug 2026 23:04:53 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1788242693; x=1788847493; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :content-type:mime-version:subject:date:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=+/werBemlVnDaMAXAHg5cgVtJvw6t+Wx76nl38H1JEI=; b=TMpRwa7ZMj7nzYfACB5Ibh1EXTpwCXDpStch5k4xTTt1HPqCSVQhBeekeysBlua9di WLujm9h+LRxK/C0qxfe9WAsBI504QfFUtQRi7vWPnvf6FzV4ivP9YBWTb8dAsxfnC89K CfdH2Uc7Mlr842/1oAq8EPKxQwiUGhs70Jfsj+xKbvKGq/hIyKDhm6Ps8+9x+AGBl68y bs91GWmOT+Gca6aq6GxPzN/A80B+uZhm9GWi7e+vYJwEF1MgT0rkjVYo/98hy7ejFoJL OuHTn3XDoKU87pXIa7N6DXWgnds4u+m6OgkxxK20Afzlyla00ieL3c264C5Ev2J78Cgx 3ImQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1788242693; x=1788847493; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :content-type:mime-version:subject:date:from:x-gm-gg :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to :content-type; bh=+/werBemlVnDaMAXAHg5cgVtJvw6t+Wx76nl38H1JEI=; b=QjzRV7kwcDqZGdgdEXYFs0UNg9tmArVE9s0Fo1yaSZTnKMdRpYmKNA0iOxVPdNLUHD 9qkoMwcTQNLG30IWNotqQYkpqz26j+yWonc0WgZP4mHGBLsHvWXQJcFxynY39d3r9950 +EirIUAZ1iryYwufyLqXwQe4qLbUaJLscC6D7THH7astxua/YBjPBHBVrsEVLudy96Aj fmdNMz1ZfurUg4ctoa5iI8SHWqvwNPU+jrypt1exM7hkL4OaARaaCRMh8xdT2jJGVUld AptEDvXg+I6xym5WvZW7oGYgXumwuwaIKSzHztf/tupqPJZDJbMSjhAn8KmI5pieDnVE SsQw== X-Forwarded-Encrypted: i=1; AKwUvBzHNnuiObmSY4xElOMJzPJ6HoztMMO5miHvd2HfIoTmNWusERO7a//2VbF6NKroPAoi+3wWj8WgUl0anp8=@vger.kernel.org X-Gm-Message-State: AFuF++n3Q9CzENMoUWSWBToEnyLY5bIHhTccRtBbRd1Fyop6dYbnN3Ue Eabw6p8LS2S65iLOlzjMqJBQYyhCW4cs4kkyxPaSyB3cAsdr4uYNFAxzcmWicAB2r6vP/WhFYC2 6DolVof03ThPz/hdPl4wOwlGxva755Su+ugz+HT/XsoV31NCwl+EbdDlTkgTgvkBS5RQ= X-Gm-Gg: AYBFou1ZwPQs4ZtOND2E/p6KQgl20cFXxeYl8aqZ2lekrKRiM8efF3+JDI59Cc/TOLH NuomtspUdqBMn8F9fNL/KV6/usIgiD3AR1/Z1rcVw+ArzrWImeJC5XQGeNG7QbatzkyXk9Fd8RU 8MAsoVHAoBzww+rLZVEnlsXpzt5xTTB9bR59h8fjKhiSKcH5LbHeh1hsIKyFuRK0wMHK5yK284H VTCpIQDtopGZjAj0CY9vSso+lRbBLb70aOU0f7pS1Rj7Uc/6qmNjSuNVNhYp28T4qopngON3iSP VBnMQulkRBDSALXoNS/2qx9YEyhLisKOUE/Mpm/O3kP/t0XyPzi3bYdYPNUmQn+YuDcH1fTe3xX 7cXlrnhO3+FOm3doRf45fNddD16JX2HCVq1/0Yy0n+wnqMqmSyVW9nQ5RSoa15uG79VINZKxD7Y lzN/GnIvGm5pJaZL1z2X0V3bQ+kbx4vg== X-Received: by 2002:a17:90b:54c5:b0:395:4de4:92c7 with SMTP id 98e67ed59e1d1-396d0e5ccc7mr50504857a91.3.1788242689654; Mon, 31 Aug 2026 23:04:49 -0700 (PDT) X-Received: by 2002:a17:90b:54c5:b0:395:4de4:92c7 with SMTP id 98e67ed59e1d1-396d0e5ccc7mr50504727a91.3.1788242688958; Mon, 31 Aug 2026 23:04:48 -0700 (PDT) Received: from hu-varada-blr.qualcomm.com (blr-bdr-fw-01_GlobalNAT_AllZones-Outside.qualcomm.com. [103.229.18.19]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-3286fa20e2fsm35855800eec.28.2026.08.31.23.04.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 31 Aug 2026 23:04:48 -0700 (PDT) From: Varadarajan Narayanan Date: Tue, 01 Sep 2026 11:34:21 +0530 Subject: [PATCH v2 3/5] phy: qcom: qmp-usb: Add IPQ9650 USB3 PHY configuration Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260901-phy-v2-3-cc93d2f3b1bf@oss.qualcomm.com> References: <20260901-phy-v2-0-cc93d2f3b1bf@oss.qualcomm.com> In-Reply-To: <20260901-phy-v2-0-cc93d2f3b1bf@oss.qualcomm.com> To: Vinod Koul , Neil Armstrong , Manivannan Sadhasivam , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Wesley Cheng , Manu Gautam , Stephen Boyd , Philipp Zabel Cc: linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Varadarajan Narayanan X-Mailer: b4 0.14.3 X-Proofpoint-GUID: 71K_mkG4x5H2pu3Zle_-7un8WqsDfH47 X-Proofpoint-Spam-Info: AW1haW4tMjYwOTAxMDA1MiBTYWx0ZWRfXzid7Q6IMfpAF Hg1Sqv4yVjyvFyY3KnNOB3mSD4nSVbPthl58f3tkZoFoeK93Y8riSGzuNfLBN6xQhJDU7T+nqy+ qgLFapzZviAvCBsd9undSlmhD/Wj/YY= X-Proofpoint-ORIG-GUID: 71K_mkG4x5H2pu3Zle_-7un8WqsDfH47 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwOTAxMDA1MiBTYWx0ZWRfXzYKuwPIDSNKL kE+kpue1cA3RR1J3rrxefOoRa8XejXrReRDOmzZO6PvjyXwcBokBOtC4ogyO6r51YNQuX4mdzcF 1lEvuj8LcXH1Lye8FEyn2mamPI0s3Hiihpkw0PUYv65kBZZPCge4WuJY9WVNMqmZIc8EePBUBs9 Uwoe2+yDeD8U0Tnap1/GjFxV/mDTUKk7LFvs6aJu7rT7RVdztDe8DMh00cfay6xRhpn2yGRejPM 8fwF6XstS1Out6Xh97pauNxKAmL/PGAeNXEA9hLSfbF+tswCddFLWz5T6J8cqIhwO+tAa66Ek4E LKcCtaph+qzpIhH/bYOGd03yGdqYxgfOzWw8Nw1dprCvGgr4kRsUroz3tuNa4RqpZHEV2pnjg8H FPknRQwECuszD5BGwgKIdM4uYIPUwmLud3W5TxzAhhsp5BmmdntPQ1yUYeNEDf0mKIIKg9HrZAR Wox/lKvgEyhY8yYVKuQ== X-Authority-Analysis: v=2.4 cv=BPWDalQG c=1 sm=1 tr=0 ts=6a966b05 cx=c_pps a=RP+M6JBNLl+fLTcSJhASfg==:117 a=Ou0eQOY4+eZoSc0qltEV5Q==:17 a=IkcTkHD0fZMA:10 a=VdqzKS8jKosA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=ZpdpYltYx_vBUK5n70dp:22 a=EUspDBNiAAAA:8 a=1pfUWIqQpZhN5ooAS-4A:9 a=QEXdDO2ut3YA:10 a=iS9zxrgQBfv6-_F4QbHw:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-09-01_01,2026-08-31_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 bulkscore=0 phishscore=0 adultscore=0 spamscore=0 lowpriorityscore=0 clxscore=1015 priorityscore=1501 malwarescore=0 impostorscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2609010052 Add the USB3 QMP PHY configuration for IPQ9650, including the SoC-specific init tables and compatible data. IPQ9650 uses settings that do not match any existing supported SoC, so add a dedicated configuration to allow the driver to support it. Signed-off-by: Varadarajan Narayanan --- drivers/phy/qualcomm/phy-qcom-qmp-usb.c | 118 ++++++++++++++++++++++++++++++++ 1 file changed, 118 insertions(+) diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-usb.c b/drivers/phy/qualcomm/phy-qcom-qmp-usb.c index b0790bcf0bc8..e772e1fa27cf 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp-usb.c +++ b/drivers/phy/qualcomm/phy-qcom-qmp-usb.c @@ -400,6 +400,101 @@ static const struct qmp_phy_init_tbl ipq8074_usb3_pcs_tbl[] = { QMP_PHY_INIT_CFG(QPHY_V3_PCS_TXDEEMPH_M3P5DB_V0, 0x0f), }; +static const struct qmp_phy_init_tbl ipq9650_usb3_serdes_tbl[] = { + QMP_PHY_INIT_CFG(QSERDES_V4_COM_PLL_IVCO, 0x0f), + QMP_PHY_INIT_CFG(QSERDES_V4_COM_SSC_EN_CENTER, 0x01), + QMP_PHY_INIT_CFG(QSERDES_V4_COM_SSC_PER1, 0x7d), + QMP_PHY_INIT_CFG(QSERDES_V4_COM_SSC_PER2, 0x01), + QMP_PHY_INIT_CFG(QSERDES_V4_COM_SSC_STEP_SIZE1_MODE0, 0x0a), + QMP_PHY_INIT_CFG(QSERDES_V4_COM_SSC_STEP_SIZE2_MODE0, 0x05), + QMP_PHY_INIT_CFG(QSERDES_V4_COM_SYSCLK_BUF_ENABLE, 0x0a), + QMP_PHY_INIT_CFG(QSERDES_V4_COM_CMN_IPTRIM, 0x20), + QMP_PHY_INIT_CFG(QSERDES_V4_COM_CP_CTRL_MODE0, 0x06), + QMP_PHY_INIT_CFG(QSERDES_V4_COM_PLL_RCTRL_MODE0, 0x16), + QMP_PHY_INIT_CFG(QSERDES_V4_COM_PLL_CCTRL_MODE0, 0x36), + QMP_PHY_INIT_CFG(QSERDES_V4_COM_SYSCLK_EN_SEL, 0x1a), + QMP_PHY_INIT_CFG(QSERDES_V4_COM_BG_TIMER, 0x0b), + QMP_PHY_INIT_CFG(QSERDES_V4_COM_LOCK_CMP_EN, 0x42), + QMP_PHY_INIT_CFG(QSERDES_V4_COM_LOCK_CMP1_MODE0, 0xd4), + QMP_PHY_INIT_CFG(QSERDES_V4_COM_LOCK_CMP2_MODE0, 0x14), + QMP_PHY_INIT_CFG(QSERDES_V4_COM_DEC_START_MODE0, 0x68), + QMP_PHY_INIT_CFG(QSERDES_V4_COM_DIV_FRAC_START1_MODE0, 0xab), + QMP_PHY_INIT_CFG(QSERDES_V4_COM_DIV_FRAC_START2_MODE0, 0xaa), + QMP_PHY_INIT_CFG(QSERDES_V4_COM_DIV_FRAC_START3_MODE0, 0x02), + QMP_PHY_INIT_CFG(QSERDES_V4_COM_VCO_TUNE_MAP, 0x00), + QMP_PHY_INIT_CFG(QSERDES_V4_COM_VCO_TUNE1_MODE0, 0x24), + QMP_PHY_INIT_CFG(QSERDES_V4_COM_VCO_TUNE2_MODE0, 0x02), + QMP_PHY_INIT_CFG(QSERDES_V4_COM_HSCLK_SEL, 0x01), + QMP_PHY_INIT_CFG(QSERDES_V4_COM_BIN_VCOCAL_CMP_CODE1_MODE0, 0xa2), + QMP_PHY_INIT_CFG(QSERDES_V4_COM_BIN_VCOCAL_CMP_CODE2_MODE0, 0x18), + QMP_PHY_INIT_CFG(QSERDES_V4_COM_BIN_VCOCAL_HSCLK_SEL, 0x01), +}; + +static const struct qmp_phy_init_tbl ipq9650_usb3_tx_tbl[] = { + QMP_PHY_INIT_CFG(QSERDES_V4_TX_RES_CODE_LANE_OFFSET_TX, 0x00), + QMP_PHY_INIT_CFG(QSERDES_V4_TX_RES_CODE_LANE_OFFSET_RX, 0x00), + QMP_PHY_INIT_CFG(QSERDES_V4_TX_LANE_MODE_1, 0xb5), + QMP_PHY_INIT_CFG(QSERDES_V4_TX_LANE_MODE_2, 0x02), + QMP_PHY_INIT_CFG(QSERDES_V4_TX_RCV_DETECT_LVL_2, 0x12), + QMP_PHY_INIT_CFG(QSERDES_V4_TX_PI_QEC_CTRL, 0x00), +}; + +static const struct qmp_phy_init_tbl ipq9650_usb3_rx_tbl[] = { + QMP_PHY_INIT_CFG(QSERDES_V4_RX_UCDR_FO_GAIN, 0x0a), + QMP_PHY_INIT_CFG(QSERDES_V4_RX_UCDR_SO_GAIN, 0x06), + QMP_PHY_INIT_CFG(QSERDES_V4_RX_UCDR_FASTLOCK_FO_GAIN, 0x0f), + QMP_PHY_INIT_CFG(QSERDES_V4_RX_UCDR_SO_SATURATION_AND_ENABLE, 0x7f), + QMP_PHY_INIT_CFG(QSERDES_V4_RX_UCDR_FASTLOCK_COUNT_LOW, 0xff), + QMP_PHY_INIT_CFG(QSERDES_V4_RX_UCDR_FASTLOCK_COUNT_HIGH, 0x0f), + QMP_PHY_INIT_CFG(QSERDES_V4_RX_UCDR_PI_CONTROLS, 0x99), + QMP_PHY_INIT_CFG(QSERDES_V4_RX_UCDR_SB2_THRESH1, 0x04), + QMP_PHY_INIT_CFG(QSERDES_V4_RX_UCDR_SB2_THRESH2, 0x08), + QMP_PHY_INIT_CFG(QSERDES_V4_RX_UCDR_SB2_GAIN1, 0x05), + QMP_PHY_INIT_CFG(QSERDES_V4_RX_UCDR_SB2_GAIN2, 0x05), + QMP_PHY_INIT_CFG(QSERDES_V4_RX_VGA_CAL_CNTRL1, 0x54), + QMP_PHY_INIT_CFG(QSERDES_V4_RX_VGA_CAL_CNTRL2, 0x0c), + QMP_PHY_INIT_CFG(QSERDES_V4_RX_GM_CAL, 0x11), + QMP_PHY_INIT_CFG(QSERDES_V4_RX_RX_EQU_ADAPTOR_CNTRL2, 0x0f), + QMP_PHY_INIT_CFG(QSERDES_V4_RX_RX_EQU_ADAPTOR_CNTRL3, 0x4a), + QMP_PHY_INIT_CFG(QSERDES_V4_RX_RX_EQU_ADAPTOR_CNTRL4, 0x0a), + QMP_PHY_INIT_CFG(QSERDES_V4_RX_RX_IDAC_TSETTLE_LOW, 0xc0), + QMP_PHY_INIT_CFG(QSERDES_V4_RX_RX_IDAC_TSETTLE_HIGH, 0x00), + QMP_PHY_INIT_CFG(QSERDES_V4_RX_RX_EQ_OFFSET_ADAPTOR_CNTRL1, 0x47), + QMP_PHY_INIT_CFG(QSERDES_V4_RX_RX_OFFSET_ADAPTOR_CNTRL2, 0x00), + QMP_PHY_INIT_CFG(QSERDES_V4_RX_SIGDET_CNTRL, 0x04), + QMP_PHY_INIT_CFG(QSERDES_V4_RX_SIGDET_DEGLITCH_CNTRL, 0x0e), + QMP_PHY_INIT_CFG(QSERDES_V4_RX_RX_MODE_01_LOW, 0xe4), + QMP_PHY_INIT_CFG(QSERDES_V4_RX_RX_MODE_01_HIGH, 0x64), + QMP_PHY_INIT_CFG(QSERDES_V4_RX_RX_MODE_01_HIGH2, 0xf6), + QMP_PHY_INIT_CFG(QSERDES_V4_RX_RX_MODE_01_HIGH3, 0x89), + QMP_PHY_INIT_CFG(QSERDES_V4_RX_RX_MODE_01_HIGH4, 0x35), + QMP_PHY_INIT_CFG(QSERDES_V4_RX_DFE_EN_TIMER, 0x04), + QMP_PHY_INIT_CFG(QSERDES_V4_RX_DFE_CTLE_POST_CAL_OFFSET, 0x38), + QMP_PHY_INIT_CFG(QSERDES_V4_RX_DCC_CTRL1, 0x0c), +}; + +static const struct qmp_phy_init_tbl ipq9650_usb3_pcs_tbl[] = { + QMP_PHY_INIT_CFG(QPHY_V4_PCS_RATE_SLEW_CNTRL1, 0x03), + QMP_PHY_INIT_CFG(QPHY_V4_PCS_LOCK_DETECT_CONFIG1, 0xd0), + QMP_PHY_INIT_CFG(QPHY_V4_PCS_LOCK_DETECT_CONFIG2, 0x07), + QMP_PHY_INIT_CFG(QPHY_V4_PCS_LOCK_DETECT_CONFIG3, 0x20), + QMP_PHY_INIT_CFG(QPHY_V4_PCS_LOCK_DETECT_CONFIG6, 0x13), + QMP_PHY_INIT_CFG(QPHY_V4_PCS_REFGEN_REQ_CONFIG1, 0x21), + QMP_PHY_INIT_CFG(QPHY_V4_PCS_RX_SIGDET_LVL, 0xaa), + QMP_PHY_INIT_CFG(QPHY_V4_PCS_RCVR_DTCT_DLY_P1U2_L, 0xe7), + QMP_PHY_INIT_CFG(QPHY_V4_PCS_RCVR_DTCT_DLY_P1U2_H, 0x03), + QMP_PHY_INIT_CFG(QPHY_V4_PCS_PCS_TX_RX_CONFIG, 0x0c), + QMP_PHY_INIT_CFG(QPHY_V4_PCS_FLL_CNTRL2, 0x83), + QMP_PHY_INIT_CFG(QPHY_V4_PCS_FLL_CNTRL1, 0x02), + QMP_PHY_INIT_CFG(QPHY_V4_PCS_FLL_CNT_VAL_L, 0x09), + QMP_PHY_INIT_CFG(QPHY_V4_PCS_FLL_CNT_VAL_H_TOL, 0xa2), + QMP_PHY_INIT_CFG(QPHY_V4_PCS_FLL_MAN_CODE, 0x40), +}; + +static const struct qmp_phy_init_tbl ipq9650_usb3_pcs_usb_tbl[] = { + QMP_PHY_INIT_CFG(QPHY_V4_PCS_USB3_LFPS_DET_HIGH_COUNT_VAL, 0xf8), +}; + static const struct qmp_phy_init_tbl msm8996_usb3_serdes_tbl[] = { QMP_PHY_INIT_CFG(QSERDES_V2_COM_SYSCLK_EN_SEL, 0x14), QMP_PHY_INIT_CFG(QSERDES_V2_COM_BIAS_EN_CLKBUFLR_EN, 0x08), @@ -1596,6 +1691,26 @@ static const struct qmp_phy_cfg ipq9574_usb3phy_cfg = { .regs = qmp_v3_usb3phy_regs_layout, }; +static const struct qmp_phy_cfg ipq9650_usb3phy_cfg = { + .offsets = &qmp_usb_offsets_v4, + + .serdes_tbl = ipq9650_usb3_serdes_tbl, + .serdes_tbl_num = ARRAY_SIZE(ipq9650_usb3_serdes_tbl), + .tx_tbl = ipq9650_usb3_tx_tbl, + .tx_tbl_num = ARRAY_SIZE(ipq9650_usb3_tx_tbl), + .rx_tbl = ipq9650_usb3_rx_tbl, + .rx_tbl_num = ARRAY_SIZE(ipq9650_usb3_rx_tbl), + .pcs_tbl = ipq9650_usb3_pcs_tbl, + .pcs_tbl_num = ARRAY_SIZE(ipq9650_usb3_pcs_tbl), + .pcs_usb_tbl = ipq9650_usb3_pcs_usb_tbl, + .pcs_usb_tbl_num = ARRAY_SIZE(ipq9650_usb3_pcs_usb_tbl), + .vreg_list = qmp_phy_vreg_l, + .num_vregs = ARRAY_SIZE(qmp_phy_vreg_l), + .regs = qmp_v4_usb3phy_regs_layout, + + .has_pwrdn_delay = true, +}; + static const struct qmp_phy_cfg msm8996_usb3phy_cfg = { .offsets = &qmp_usb_offsets_v3_msm8996, @@ -2483,6 +2598,9 @@ static const struct of_device_id qmp_usb_of_match_table[] = { }, { .compatible = "qcom,ipq9574-qmp-usb3-phy", .data = &ipq9574_usb3phy_cfg, + }, { + .compatible = "qcom,ipq9650-qmp-usb3-phy", + .data = &ipq9650_usb3phy_cfg, }, { .compatible = "qcom,msm8996-qmp-usb3-phy", .data = &msm8996_usb3phy_cfg, -- 2.34.1