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Tue, 01 Sep 2026 06:20:17 -0700 (PDT) Received: from SMW024614.wbi.nxp.com ([128.77.115.157]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-c25618430fasm580304366b.22.2026.09.01.06.20.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Sep 2026 06:20:17 -0700 (PDT) From: Laurentiu Mihalcea To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Sascha Hauer , Frank Li , Fabio Estevam , elena.popa@nxp.com, cosmin.stoica@nxp.com Cc: Pengutronix Kernel Team , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org Subject: [PATCH v3 0/2] Introduce basic support for MR-NAVQ95 Date: Tue, 1 Sep 2026 06:19:16 -0700 Message-ID: <20260901131918.1189-1-laurentiumihalcea111@gmail.com> X-Mailer: git-send-email 2.43.0 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit From: Laurentiu Mihalcea Hi folks, So, as the title says, this series attempts to introduce basic support for NXP's MR-NAVQ95 board. The "basic support" refers to introducing a new DTS and enabling a couple of peripherals so that the board'll be able to boot from eMMC/SD/NFS. So, compared to MX95-19x19-EVK, this board has a smaller form factor (comparable to the MX95-based FRDM boards) and is designed for robotics-related applications (e.g. drones, rovers, humanoids, etc...). The board is currently at revision B and is only available internally. The board should be officially announced around October/November 2026. Given that the board and its support are fairly new and still under development, I would expect some (hopefully) small changes to the DTS. Hopefully, this'll be acceptable. The schematics, a brief overview and some pictures of the board are publicly available at [1]. [1]: https://github.com/NXP-Robotics/MR-NAVQ95 --- Changes in v3: * use "gpios" instead of the deprecated "gpio" for the "regulator-usdhc2" node. * fix issues raised by running "dt-check-style --mode strict". Note that "dt-check-style" still reports the following issues: [property-order] property 'compatible' out of canonical order [...] [line-length] line exceeds 80 columns [...] these'll be fixed by Krzysztof Kozlowski's on-going patches: [3]. Manually applied his patches and dt-check-style seems happy with the DTS. * link to v2: https://lore.kernel.org/imx/20260827150657.1657-1-laurentiumihalcea111@gmail.com/ [3]: https://lore.kernel.org/lkml/20260826-n-dts-style-checker-continued-v5-0-fdd16ca6e771@oss.qualcomm.com/ Changes in v2: * remove the "pinctrl_usdhc2_100mhz", "pinctrl_usdhc2_200mhz", and "pinctrl_usdhc1_100mhz" DT nodes as they have the same configuration as "pinctrl_usdhc2" and "pinctrl_usdhc1", respectively. * add "bootph-pre-ram" property to all nodes that were included in Elena's u-boot patches. See [2]. Note that "imx95-u-boot.dtsi" is still required for the binman node and for the rest of the nodes tagged with "bootph-pre-ram". * link to v1: https://lore.kernel.org/imx/20260825120812.2152-1-laurentiumihalcea111@gmail.com/ [2]: https://lists.u-boot-project.org/pipermail/u-boot/2026-August/629002.html --- Laurentiu Mihalcea (2): dt-bindings: arm: fsl: add MR-NAVQ95 board arm64: dts: freescale: add MR-NAVQ95 basic board support .../devicetree/bindings/arm/fsl.yaml | 1 + arch/arm64/boot/dts/freescale/Makefile | 1 + arch/arm64/boot/dts/freescale/imx95-navq.dts | 222 ++++++++++++++++++ 3 files changed, 224 insertions(+) create mode 100644 arch/arm64/boot/dts/freescale/imx95-navq.dts -- 2.53.0