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From: "Chang S. Bae" <chang.seok.bae@intel.com>
To: linux-kernel@vger.kernel.org
Cc: x86@kernel.org, tglx@kernel.org, mingo@redhat.com, bp@alien8.de,
	dave.hansen@linux.intel.com, hpa@zytor.com,
	andrew.cooper3@citrix.com, arjan.van.de.ven@intel.com,
	chang.seok.bae@intel.com
Subject: [PATCH RFC 8/8] x86/microcode/intel: Select the lowest loadable revision for iterative loading
Date: Tue,  1 Sep 2026 23:16:33 +0000	[thread overview]
Message-ID: <20260901231634.714144-9-chang.seok.bae@intel.com> (raw)
In-Reply-To: <20260901231634.714144-1-chang.seok.bae@intel.com>

The iterative loading logic in the core can repeatedly request a
microcode patch. The vendor parser currently selects the highest loadable
revision, which means no further patch can be selected after the first
update.

To load a concatenated multi-blob image incrementally, adjust the blob
parser to select the lowest loadable revision. This allows patches to be
applied in ascending revision order.

Signed-off-by: Chang S. Bae <chang.seok.bae@intel.com>
---
 arch/x86/kernel/cpu/microcode/intel.c | 34 ++++++++++++++++++++++-----
 1 file changed, 28 insertions(+), 6 deletions(-)

diff --git a/arch/x86/kernel/cpu/microcode/intel.c b/arch/x86/kernel/cpu/microcode/intel.c
index 48e7d023ea41..3a699e361fe0 100644
--- a/arch/x86/kernel/cpu/microcode/intel.c
+++ b/arch/x86/kernel/cpu/microcode/intel.c
@@ -864,14 +864,39 @@ static enum ucode_state apply_microcode_late(int cpu)
 	return ret;
 }
 
+static bool is_revision_candidate(unsigned int cur_rev, unsigned int rev)
+{
+	/*
+	 * A revision must be newer than the active microcode revision to be
+	 * loadable.
+	 */
+	if (rev <= boot_cpu_data.microcode)
+		return false;
+
+	/*
+	 * Iterative loading selects the lowest loadable revision so that
+	 * revisions can be applied incrementally.
+	 */
+	if (iterative_loading)
+		return rev < cur_rev;
+
+	/* Legacy late loading selects the highest loadable revision. */
+	return rev > cur_rev;
+}
+
 static enum ucode_state parse_microcode_blobs(int cpu, struct iov_iter *iter)
 {
 	struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
+	unsigned int cur_rev, curr_mc_size = 0;
 	bool is_safe, new_is_safe = false;
-	int cur_rev = uci->cpu_sig.rev;
-	unsigned int curr_mc_size = 0;
 	u8 *new_mc = NULL, *mc = NULL;
 
+	/*
+	 * Start from the boundary value for the revision search. With iterative
+	 * loading search walks downward but the legacy search walks upward.
+	 */
+	cur_rev = iterative_loading ? UINT_MAX : 0;
+
 	while (iov_iter_count(iter)) {
 		struct microcode_header_intel mc_header;
 		unsigned int mc_size, data_size;
@@ -908,7 +933,7 @@ static enum ucode_state parse_microcode_blobs(int cpu, struct iov_iter *iter)
 		    intel_microcode_sanity_check(mc, true, MC_HEADER_TYPE_MICROCODE) < 0)
 			goto fail;
 
-		if (cur_rev >= mc_header.rev)
+		if (!is_revision_candidate(cur_rev, mc_header.rev))
 			continue;
 
 		if (!intel_find_matching_signature(mc, &uci->cpu_sig))
@@ -978,9 +1003,6 @@ static enum ucode_state request_microcode_fw(int cpu, struct device *device)
 	if (is_late_loading_denied(cpu))
 		return UCODE_NFOUND;
 
-	if (iterative_loading)
-		return UCODE_NFOUND;
-
 	sprintf(name, "intel-ucode/%02x-%02x-%02x",
 		c->x86, c->x86_model, c->x86_stepping);
 
-- 
2.53.0


      parent reply	other threads:[~2026-09-01 23:43 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-09-01 23:16 [PATCH 0/8] x86/microcode: Address GNR errata and follow-up Chang S. Bae
2026-09-01 23:16 ` [PATCH 1/8] x86/microcode/intel: Reject problematic loading on GNR systems Chang S. Bae
2026-09-02 13:11   ` Sohil Mehta
2026-09-02 13:21     ` Van De Ven, Arjan
2026-09-02 14:23   ` Dave Hansen
2026-09-03  1:51   ` Borislav Petkov
2026-09-03 21:04     ` Chang S. Bae
2026-09-01 23:16 ` [PATCH 2/8] x86/microcode: Solidify base_rev= option parsing Chang S. Bae
2026-09-01 23:16 ` [PATCH 3/8] x86/microcode: Accept a boolean for force_minrev parameter Chang S. Bae
2026-09-01 23:16 ` [PATCH 4/8] x86/microcode: Mark early_data __initdata Chang S. Bae
2026-09-01 23:16 ` [PATCH RFC 5/8] x86/microcode: Decouple minimum revision check from late loading Chang S. Bae
2026-09-01 23:16 ` [PATCH RFC 6/8] x86/microcode/intel: Apply minimum revision check to early loading Chang S. Bae
2026-09-01 23:16 ` [PATCH RFC 7/8] x86/microcode: Introduce iterative late loading Chang S. Bae
2026-09-01 23:16 ` Chang S. Bae [this message]

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