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[2.51.220.108]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-48448e72b5bsm6385800f8f.4.2026.09.02.06.08.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 02 Sep 2026 06:08:10 -0700 (PDT) From: Alexey Charkov Date: Wed, 02 Sep 2026 17:07:53 +0400 Subject: [PATCH v2 2/4] dt-bindings: nvmem: layouts: Add Rockchip OTP CPUID layout Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260902-rk3576-otp-cpuid-mac-v2-2-e4b7fe2ab13f@flipper.net> References: <20260902-rk3576-otp-cpuid-mac-v2-0-e4b7fe2ab13f@flipper.net> In-Reply-To: <20260902-rk3576-otp-cpuid-mac-v2-0-e4b7fe2ab13f@flipper.net> To: Srinivas Kandagatla , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Michael Walle , Miquel Raynal , Finley Xiao , Greg Kroah-Hartman Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org, linux-arm-kernel@lists.infradead.org, Alexey Charkov X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=4722; i=alchark@flipper.net; h=from:subject:message-id; bh=/RzWURUSlbLsxwiuIazTsYvvak9uXPkuT7+9wqJHcUM=; b=owGbwMvMwCW2adGNfoHIK0sZT6slMWTNkN98wCL61IsMQ7/0dv97TsGZmfZJz1W42WaKZtU0M Rt5c6Z1TGRhEONisBRTZJn7bYntVCO+Wbs8PL7CzGFlAhkiLdLAAAQsDHy5iXmlRjpGeqbahnqG RjrGOkYMXJwCMNXpLYwMy83XL+BRTM0vC1bx833+6pLjDmXt45cSjoV1f2O+cuhrKiPDj1/BvPa JFlwa/7vjN7y+NLmKzZgx8uDyNzLpKcrtjNPYAA== X-Developer-Key: i=alchark@flipper.net; a=openpgp; fpr=9DF6A43D95320E9ABA4848F5B2A2D88F1059D4A5 Rockchip SoCs ship with a unique CPU ID programmed into their internal OTP memory, and Rockchip bootloaders derive Ethernet MAC addresses from it so that boards with no dedicated storage for one still get a stable address. Describe that derivation as an NVMEM layout, so that the resulting addresses become available through the standard nvmem "mac-address" cell whether or not the firmware got a chance to patch them into the device tree. Keep the compatible SoC specific, as the location of the CPU ID within the OTP memory differs between SoCs. Signed-off-by: Alexey Charkov --- .../bindings/nvmem/layouts/nvmem-layout.yaml | 1 + .../nvmem/layouts/rockchip,rk3576-otp-cpuid.yaml | 73 ++++++++++++++++++++++ MAINTAINERS | 6 ++ 3 files changed, 80 insertions(+) diff --git a/Documentation/devicetree/bindings/nvmem/layouts/nvmem-layout.yaml b/Documentation/devicetree/bindings/nvmem/layouts/nvmem-layout.yaml index 382507060651..ab94dbb41aac 100644 --- a/Documentation/devicetree/bindings/nvmem/layouts/nvmem-layout.yaml +++ b/Documentation/devicetree/bindings/nvmem/layouts/nvmem-layout.yaml @@ -21,6 +21,7 @@ oneOf: - $ref: fixed-layout.yaml - $ref: kontron,sl28-vpd.yaml - $ref: onie,tlv-layout.yaml + - $ref: rockchip,rk3576-otp-cpuid.yaml - $ref: u-boot,env.yaml properties: diff --git a/Documentation/devicetree/bindings/nvmem/layouts/rockchip,rk3576-otp-cpuid.yaml b/Documentation/devicetree/bindings/nvmem/layouts/rockchip,rk3576-otp-cpuid.yaml new file mode 100644 index 000000000000..85153d480950 --- /dev/null +++ b/Documentation/devicetree/bindings/nvmem/layouts/rockchip,rk3576-otp-cpuid.yaml @@ -0,0 +1,73 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/nvmem/layouts/rockchip,rk3576-otp-cpuid.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NVMEM layout of the CPU ID in Rockchip OTP memory + +maintainers: + - Alexey Charkov + +description: | + Rockchip SoCs are shipped with a unique CPU ID programmed into their + internal OTP memory. Rockchip bootloaders derive Ethernet MAC addresses + from it, so that boards which have no dedicated storage for a MAC address + still get a stable one. The addresses are computed by hashing the lowercase + hexadecimal representation of the CPU ID with SHA-256 and taking the first + six octets of the digest, with the multicast bit cleared and the locally + administered bit set. + + The location of the CPU ID within the OTP memory differs between SoCs, + hence the SoC specific compatible. + +select: false + +properties: + compatible: + const: rockchip,rk3576-otp-cpuid + + mac-address: + type: object + description: + MAC address derived from the CPU ID. The first argument of the phandle + selects one of the two addresses that can be derived (can be 0 or 1). + + properties: + "#nvmem-cell-cells": + const: 1 + + additionalProperties: false + +required: + - compatible + +additionalProperties: false + +examples: + - | + #include + #include + + soc { + #address-cells = <2>; + #size-cells = <2>; + + otp@2a580000 { + compatible = "rockchip,rk3576-otp"; + reg = <0x0 0x2a580000 0x0 0x400>; + clocks = <&cru CLK_OTPC_NS>, <&cru PCLK_OTPC_NS>, + <&cru CLK_OTP_PHY_G>; + clock-names = "otp", "apb_pclk", "phy"; + resets = <&cru SRST_OTPC_NS>, <&cru SRST_P_OTPC_NS>; + reset-names = "otp", "apb"; + + nvmem-layout { + compatible = "rockchip,rk3576-otp-cpuid"; + + otp_mac_address: mac-address { + #nvmem-cell-cells = <1>; + }; + }; + }; + }; diff --git a/MAINTAINERS b/MAINTAINERS index eb4e5a61056e..f3d07ce7b3c8 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -23722,6 +23722,12 @@ F: Documentation/userspace-api/media/v4l/metafmt-rkisp1.rst F: drivers/media/platform/rockchip/rkisp1 F: include/uapi/linux/rkisp1-config.h +ROCKCHIP OTP CPUID NVMEM LAYOUT DRIVER +M: Alexey Charkov +L: linux-rockchip@lists.infradead.org +S: Maintained +F: Documentation/devicetree/bindings/nvmem/layouts/rockchip,rk3576-otp-cpuid.yaml + ROCKCHIP RK3568 RANDOM NUMBER GENERATOR SUPPORT M: Daniel Golle M: Aurelien Jarno -- 2.54.0