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Wed, 02 Sep 2026 13:43:55 -0700 (PDT) Received: from hu-mojha-hyd.qualcomm.com ([202.46.23.25]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-33255d39d21sm613338eec.16.2026.09.02.13.43.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 02 Sep 2026 13:43:54 -0700 (PDT) From: Mukesh Ojha To: Bjorn Andersson , Mathieu Poirier , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Manivannan Sadhasivam Cc: linux-arm-msm@vger.kernel.org, linux-remoteproc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Mukesh Ojha Subject: [PATCH v2 3/3] remoteproc: qcom_q6v5_pas: add per-PD proxy performance states for Hawi CDSP Date: Thu, 3 Sep 2026 02:13:34 +0530 Message-ID: <20260902204334.2061226-4-mukesh.ojha@oss.qualcomm.com> X-Mailer: git-send-email 2.55.0 In-Reply-To: <20260902204334.2061226-1-mukesh.ojha@oss.qualcomm.com> References: <20260902204334.2061226-1-mukesh.ojha@oss.qualcomm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Proofpoint-GUID: stccog3wmjy6F4UE09PDn4l0RqcWE7-R X-Authority-Analysis: v=2.4 cv=FeAHAp+6 c=1 sm=1 tr=0 ts=6a988a8c cx=c_pps a=UNFcQwm+pnOIJct1K4W+Mw==:117 a=ZePRamnt/+rB5gQjfz0u9A==:17 a=VdqzKS8jKosA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=DJpcGTmdVt4CTyJn9g5Z:22 a=EUspDBNiAAAA:8 a=EzEDkhfgfUAEW4_RwPsA:9 a=uKXjsCUrEbL0IQVhDsJ9:22 X-Proofpoint-Spam-Info: AW1haW4tMjYwOTAyMDE4MyBTYWx0ZWRfXxukMtywXJfnE HR/qLrlvc5UefbbXbNebTiHu48at1DreFTCK7NeYj2nXotkFhNxy5NSqdm52dNTw4h2IUhSheSd bgkFf6CdCkFh/qDjFdqFJo+uiLupaWM= X-Proofpoint-ORIG-GUID: stccog3wmjy6F4UE09PDn4l0RqcWE7-R X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwOTAyMDE4MyBTYWx0ZWRfX42qp8FXbhPSI rN3FaFdYDWDMUeaIkTeYFQ4sB0PiYFZdX7YqK79hxnYI5qhnBo5sV2d2zj7PPxMUCaulcBYTwxO KW4yuIpS2AuKCnbdcjo+mYCkyYhnxgmgxudRZNovzhqNRKdnQsU4iM5vOZDMf15Lbohb8pLdWVe 8v4whMyX5RwdDfpr0gts+wtHzCiBbxwLSiaT1MzdxbFgh2ss59FaCvaXoh/1sCWfrdhozpfX0yG nd2QAD/byte0z+2vITce0YJqrpiEeUp7MCE0MdRXSyJAus0yU2JGmBM6fuI5K/yz7wuaPfULhAK eEHzWWxX+n5d+foV6uZmfpLfvuDhl8BIOQqiHKJhaAySD0SjHoVqspmtOpT01XHf+loNKP7BAlo A7gIPaqegBgziw7UBEb/Y756NgZUlGoD7mVTg1ah1U/P98rAyJRrqYuAciAoQwJY6lJvqlDq5ZZ uiG29Kj93/T6Z+IFfQQ== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-09-02_05,2026-09-02_04,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 impostorscore=0 malwarescore=0 adultscore=0 lowpriorityscore=0 priorityscore=1501 bulkscore=0 phishscore=0 clxscore=1015 spamscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2609020183 The proxy power domain enable path requests INT_MAX performance state for every proxy PD. On Hawi, the NSP proxy power domain's RPMH power domain has no OPP at INT_MAX, while CX and MXC accept INT_MAX, mapping to their maximum supported level. Introduce a proxy_pd_performance_states array in qcom_pas_data to allow per-PD RPMH levels to be declared explicitly. Platforms that omit this field retain the existing INT_MAX behaviour. Add Hawi CDSP remoteproc support with the following proxy PD performance states: CX: RPMH_REGULATOR_LEVEL_TURBO MXC: RPMH_REGULATOR_LEVEL_TURBO NSP: RPMH_REGULATOR_LEVEL_NOM Signed-off-by: Mukesh Ojha --- drivers/remoteproc/qcom_q6v5_pas.c | 50 ++++++++++++++++++++++++++++-- 1 file changed, 48 insertions(+), 2 deletions(-) diff --git a/drivers/remoteproc/qcom_q6v5_pas.c b/drivers/remoteproc/qcom_q6v5_pas.c index 01dc0194e130..c8bba2418d0d 100644 --- a/drivers/remoteproc/qcom_q6v5_pas.c +++ b/drivers/remoteproc/qcom_q6v5_pas.c @@ -28,6 +28,7 @@ #include #include #include +#include #include "qcom_common.h" #include "qcom_pil_info.h" @@ -51,6 +52,8 @@ struct qcom_pas_data { bool decrypt_shutdown; char **proxy_pd_names; + const unsigned int *proxy_pd_performance_states; + unsigned int num_proxy_pd_performance_states; const char *load_state; const char *ssr_name; @@ -79,6 +82,7 @@ struct qcom_pas { struct regulator *px_supply; struct device *proxy_pds[3]; + const unsigned int *proxy_pd_performance_states; int proxy_pd_count; @@ -167,11 +171,16 @@ static int qcom_pas_pds_enable(struct qcom_pas *pas, struct device **pds, int i; for (i = 0; i < pd_count; i++) { - ret = dev_pm_genpd_set_performance_state(pds[i], INT_MAX); + unsigned int state = INT_MAX; + + if (pas->proxy_pd_performance_states) + state = pas->proxy_pd_performance_states[i]; + + ret = dev_pm_genpd_set_performance_state(pds[i], state); if (ret) dev_warn(pas->dev, "failed to set proxy PD %d state %u: %d\n", - i, INT_MAX, ret); + i, state, ret); ret = pm_runtime_get_sync(pds[i]); if (ret < 0) { pm_runtime_put_noidle(pds[i]); @@ -877,6 +886,7 @@ static int qcom_pas_probe(struct platform_device *pdev) pas->info_name = desc->sysmon_name; pas->smem_host_id = desc->smem_host_id; pas->decrypt_shutdown = desc->decrypt_shutdown; + pas->proxy_pd_performance_states = desc->proxy_pd_performance_states; pas->region_assign_idx = desc->region_assign_idx; pas->region_assign_count = min_t(int, MAX_ASSIGN_COUNT, desc->region_assign_count); pas->region_assign_vmid = desc->region_assign_vmid; @@ -912,6 +922,14 @@ static int qcom_pas_probe(struct platform_device *pdev) goto unassign_mem; pas->proxy_pd_count = ret; + if (WARN(desc->proxy_pd_performance_states && + desc->num_proxy_pd_performance_states != pas->proxy_pd_count, + "proxy_pd_performance_states count %u != pd count %d\n", + desc->num_proxy_pd_performance_states, pas->proxy_pd_count)) { + ret = -EINVAL; + goto detach_proxy_pds; + } + ret = qcom_q6v5_init(&pas->q6v5, pdev, rproc, desc->crash_reason_smem, desc->load_state, qcom_pas_handover); if (ret) @@ -1802,6 +1820,33 @@ static const struct qcom_pas_data glymur_soccp_resource = { .needs_tzmem = true, }; +static const struct qcom_pas_data hawi_cdsp_resource = { + .crash_reason_smem = 601, + .firmware_name = "cdsp.mdt", + .dtb_firmware_name = "cdsp_dtb.mdt", + .pas_id = 18, + .dtb_pas_id = 0x25, + .minidump_id = 7, + .auto_boot = true, + .proxy_pd_names = (char*[]){ + "cx", + "mxc", + "nsp", + NULL + }, + .proxy_pd_performance_states = (const unsigned int[]){ + RPMH_REGULATOR_LEVEL_TURBO, + RPMH_REGULATOR_LEVEL_TURBO, + RPMH_REGULATOR_LEVEL_NOM, + }, + .num_proxy_pd_performance_states = 3, + .load_state = "cdsp", + .ssr_name = "cdsp", + .sysmon_name = "cdsp", + .ssctl_id = 0x17, + .smem_host_id = 5, +}; + static const struct qcom_pas_data eliza_cdsp_resource = { .crash_reason_smem = 601, .firmware_name = "cdsp.mbn", @@ -1831,6 +1876,7 @@ static const struct of_device_id qcom_pas_of_match[] = { { .compatible = "qcom,eliza-adsp-pas", .data = &sm8550_adsp_resource }, { .compatible = "qcom,eliza-cdsp-pas", .data = &eliza_cdsp_resource }, { .compatible = "qcom,glymur-soccp-pas", .data = &glymur_soccp_resource }, + { .compatible = "qcom,hawi-cdsp-pas", .data = &hawi_cdsp_resource }, { .compatible = "qcom,kaanapali-soccp-pas", .data = &kaanapali_soccp_resource }, { .compatible = "qcom,milos-adsp-pas", .data = &sm8550_adsp_resource }, { .compatible = "qcom,milos-cdsp-pas", .data = &milos_cdsp_resource }, -- 2.55.0