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Wed, 02 Sep 2026 14:43:26 -0700 (PDT) From: Alex Elder To: andersson@kernel.org, konradybcio@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org Cc: mani@kernel.org, krishna.chundru@oss.qualcomm.com, dmitry.baryshkov@oss.qualcomm.com, sushrut.trivedi@oss.qualcomm.com, umang.chheda@oss.qualcomm.com, rosh@debian.org, jsandom@axon.com, daniel@riscstar.com, mohd.anwar@oss.qualcomm.com, lorenzo.bianconi@oss.qualcomm.com, devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, Manivannan Sadhasivam , Konrad Dybcio , Abel Vesa Subject: [PATCH v3 1/6] arm64: dts: qcom: qcs6490-rb3gen2: clean up PCI function nodes Date: Wed, 2 Sep 2026 16:43:15 -0500 Message-ID: <20260902214321.1721477-2-elder@riscstar.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260902214321.1721477-1-elder@riscstar.com> References: <20260902214321.1721477-1-elder@riscstar.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit The TC9564 SoC contains a PCIe switch with three downstream ports. The third downstream port connects to an embedded PCI endpoint, and that endpoint implements two PCI functions. The devicetree node describing those functions incorrectly includes this property: device_type = "pci"; That property should only be used for a PCI device "that implements a PCI bus", but not a PCIe function. So remove the device_type property from the nodes representing the two embedded PCI functions. Additionally, only PCI bridge nodes should be named "pcie@" (or "pci@"). PCI endpoint nodes are typically named based on the functionality they implement (e.g., "ethernet@"). In this case, the role of these PCI functions is not (yet) specified, and furthermore they will be used with PCI endpoint buses. Rename these to use "dev@", following the convention used in of_pci_make_dev_node() for dynamically-created devicetree nodes. Finally, those properties contain #address-cells, #size-cells, and ranges properties. And although these properties *will* be appropriate for these functions on an RB3gen2, they are not normally used for PCI functions. So remove these properties as well; we'll include them in the commit that actually adds a pci-ep-bus sub-node to these PCI function nodes. Reviewed-by: Manivannan Sadhasivam Reviewed-by: Konrad Dybcio Reviewed-by: Abel Vesa Fixes: aa7b4bbcb3a1d ("arm64: dts: qcom: qcs6490-rb3gen2: Add TC9563 PCIe switch node") Signed-off-by: Alex Elder --- arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts | 12 ++---------- 1 file changed, 2 insertions(+), 10 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts index a13315bf0fb07..3bb5fca8e2b13 100644 --- a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts +++ b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts @@ -954,20 +954,12 @@ pcie@3,0 { ranges; bus-range = <0x5 0xff>; - pcie@0,0 { + dev@0,0 { reg = <0x50000 0x0 0x0 0x0 0x0>; - #address-cells = <3>; - #size-cells = <2>; - device_type = "pci"; - ranges; }; - pcie@0,1 { + dev@0,1 { reg = <0x50100 0x0 0x0 0x0 0x0>; - #address-cells = <3>; - #size-cells = <2>; - device_type = "pci"; - ranges; }; }; }; -- 2.53.0