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Thu, 03 Sep 2026 00:31:45 -0700 (PDT) Received: from deb05.proceq.com ([213.160.61.66]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-49ce551bf7asm69369455e9.2.2026.09.03.00.31.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 03 Sep 2026 00:31:45 -0700 (PDT) From: Mehmet Fide To: Bartosz Golaszewski , Linus Walleij Cc: Dong Aisheng , Fabio Estevam , Frank Li , Jacky Bai , Sascha Hauer , Pengutronix Kernel Team , imx@lists.linux.dev, linux-gpio@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Mehmet Fide Subject: [PATCH v4 0/3] gpio: mmio: report the line direction on chips without direction registers Date: Thu, 3 Sep 2026 09:31:40 +0200 Message-ID: <20260903073143.2068494-1-mehmet.fide@gmail.com> X-Mailer: git-send-email 2.54.0 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit From: Mehmet Fide Hi Bartosz, Linus, this replaces the gpiolib guard patch [1], along the lines Bartosz suggested there: instead of teaching gpiod_get_direction() to stay quiet when a chip has no get_direction(), give gpio-mmio one and let the pin controller tell it what the pad does. The user is the Vybrid GPIO block (gpio-vf610, a generic mmio chip with GPIO_GENERIC_PINCTRL_BACKEND and no direction registers, the direction lives in the iomuxc pad as the OBE bit). Today every gpiod_get_direction() there trips the WARN in gpiolib, 21 backtraces per boot on a Colibri VF61/VF50. Patch 1 is the pinctrl-imx side. Bartosz asked whether the raw register coming back from pin_config_get() is a bug in pinctrl-imx: it is, the callback never looked at which parameter was requested. It now answers PIN_CONFIG_OUTPUT_ENABLE and PIN_CONFIG_INPUT_ENABLE on SoCs that say where those bits live (Vybrid: OBE bit 1, IBE bit 0) and -ENOTSUPP for everything else, the SCU based SoCs included; the debugfs dump, the only raw-register user, reads the register through its own helper. The set callback stays raw, as the fsl,pins binding requires. Converting the driver fully to generic pinconf is a bigger job than this fix needs. Patch 2 is what Linus asked for on v3: an optional get_config() in struct gpio_chip and gpiochip_generic_get_config() as its pin control backed implementation, the mirror of gpiochip_generic_config(). No consumer API. Patch 3 keeps the direction in gpio-mmio's existing shadow and installs the shadow-reading get_direction() for the "pinctrl backend, no direction registers" combination. The pad is asked once, from request(), in process context, through gc->get_config(), so it is safe for the gpiochip_lock_as_irq() path that calls get_direction() under the irq descriptor lock. Tested on a Colibri VF61 (Iris carrier) on top of gpio/for-next, with DEBUG_ATOMIC_SLEEP and PROVE_LOCKING enabled: no backtraces, and /sys/kernel/debug/gpio shows the right direction for every requested line (the hogs, the SD card detect input, the USB VBUS regulator output). Lines the pin controller cannot answer for keep the input default gpiolib assumed before, so nothing that worked before is affected. The initial direction scan in gpiochip_add_data_with_key() runs before the pin ranges exist and still guesses; only requested lines get the real answer. Patch 1 was also booted on a Verdin iMX8MP (gprarray, 6.12.107): the pinconf-pins and pinconf-groups debugfs dumps are byte for byte the same as before the patch, and nothing else changed. Patch 3 needs patch 1 to give correct answers; taking all three through one tree, with an ack from the other side, avoids the window. [1] https://lore.kernel.org/linux-gpio/20260813193715.2346477-1-mehmet.fide@gmail.com/ Changes in v4: - new patch 2: get_config() in struct gpio_chip and gpiochip_generic_get_config() (Linus) - patch 3: seed the shadow through gc->get_config(), no pinctrl call and no CONFIG_PINCTRL check in gpio-mmio (Linus) - patch 1: drop the npins check, pin_request() already rejects a pin the controller does not have Changes in v3: - patch 1: return -ENOTSUPP for the SCU based SoCs instead of letting the firmware call hand back the raw pad value (Sashiko review) - patch 1: -EINVAL for a pin the device tree never configured, -ENOTSUPP only for unsupported parameters and SoCs - patch 1, 2: drop two comments that only restated the code Changes in v2: - patch 1: decode the requested parameter instead of returning the raw register; debugfs group dump reads the register through its own helper - patch 2: keep the direction in the gpio-mmio shadow, ask pinctrl once from request() instead of from get_direction() Mehmet Fide (3): pinctrl: imx: answer OUTPUT_ENABLE/INPUT_ENABLE queries from the pad register gpiolib: add get_config() and gpiochip_generic_get_config() gpio: mmio: track the direction of chips without direction registers Documentation/driver-api/gpio/driver.rst | 6 +++ drivers/gpio/gpio-mmio.c | 60 +++++++++++++++++++++-- drivers/gpio/gpiolib.c | 23 +++++++++ drivers/pinctrl/freescale/pinctrl-imx.c | 54 ++++++++++++++++++-- drivers/pinctrl/freescale/pinctrl-imx.h | 4 ++ drivers/pinctrl/freescale/pinctrl-vf610.c | 2 + include/linux/gpio/driver.h | 9 ++++ 7 files changed, 150 insertions(+), 8 deletions(-) base-commit: 1900b5a41493e7050c68c1e62780d6fb9a209457 -- 2.54.0