From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from bali.collaboradmins.com (bali.collaboradmins.com [148.251.105.195]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 901884F6473; Fri, 4 Sep 2026 15:58:50 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=148.251.105.195 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788537532; cv=none; b=Ur6IFdAC9dlIa9gc/XqM4qf6tItv+rVOZoX8Y31cXlI5S57QKh4Psy3gVsFvZJd/oTqwVQiOwleJVE9BLciALgMgI+iQqdLiVNYNs0GlCkSCyIQGrxGISB9vM0dh+rM2o5sYO30VO6lnfFXG505x6jqu1O8A/hVkdhedG9ATdCU= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788537532; c=relaxed/simple; bh=m2yiWy5le2r+frQc8DgaYIgBdSKa3Pdp/bb9fJVyV0E=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=nDsKAWR/anEKX7I00MXMiesHywRDTsJjWVPrqRqzQ+zuKYsKNTISlQCyu7mxQkYBUBrDa2J5X8B+/uEd7HvPfFY/55600ttwrxlzVho9zYRzvMWp1QpD3CDLwFFwHMnvchWOObkJb9/VaJobaAE3OAlO9fVpCM5pmEGQqlY46g0= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com; spf=pass smtp.mailfrom=collabora.com; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b=LnxI6vKz; arc=none smtp.client-ip=148.251.105.195 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=collabora.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b="LnxI6vKz" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1788537528; bh=m2yiWy5le2r+frQc8DgaYIgBdSKa3Pdp/bb9fJVyV0E=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=LnxI6vKzvGtSTu1ySiUT6dyldjzeY0cm2jpyNWmndPdisLuApykaiWi7VnA5gY5a8 VmMlEViXGGVnfa2UUl7kEO2aa04W6spVeh27RW9R7aKQIgW1eprfoXubvARn15F2AL DQ/m1hZZiESLMlTOaISKNX9A4K7fovnt8X4aOUojpmJEnIDk/bGQoPywUduphkXv0B f4Preaq7oEaj1O3+Wth1SIxk11X8yU6UFw4QRMC+8phNMJqeZ5u/pA/3cpn5Wy3qrC /mKK9mKKATSa8b1KkRsptDNFUAc2B3NzP0KIp9GqyERQWFA9o3J7Qrq3Jf4uKhrlsH T24/fgvrxvIOQ== Received: from yukiji.home (unknown [100.64.0.131]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange x25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: laeyraud) by bali.collaboradmins.com (Postfix) with ESMTPSA id 5D77B17E0F85; Fri, 04 Sep 2026 17:58:47 +0200 (CEST) From: Louis-Alexis Eyraud Date: Fri, 04 Sep 2026 17:58:14 +0200 Subject: [PATCH v6 03/27] dt-bindings: clock: mediatek: Make '#clock-cells' required for MT8195 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260904-mt8189-clocks-system-base-v6-3-5df247f56938@collabora.com> References: <20260904-mt8189-clocks-system-base-v6-0-5df247f56938@collabora.com> In-Reply-To: <20260904-mt8189-clocks-system-base-v6-0-5df247f56938@collabora.com> To: Stephen Boyd , Brian Masney , Jerome Brunet , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger , AngeloGioacchino Del Regno , Chun-Jie Chen , Chen-Yu Tsai , Philipp Zabel , Edward-JW Yang Cc: kernel@collabora.com, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, Conor Dooley , Louis-Alexis Eyraud X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1788537522; l=1753; i=louisalexis.eyraud@collabora.com; s=20250113; h=from:subject:message-id; bh=m2yiWy5le2r+frQc8DgaYIgBdSKa3Pdp/bb9fJVyV0E=; b=1Q205bry8LCzKdRAN08IB2VG0Q/oataj2IJrc5YW1QC52QXClji4/giVbS32U+79GX6ryBFHN g2EfKkyHiD2AoLiAvUg1IRBP41GMql2gjYBzQ7t6z5q4N7kejTRLuaW X-Developer-Key: i=louisalexis.eyraud@collabora.com; a=ed25519; pk=CHFBDB2Kqh4EHc6JIqFn69GhxJJAzc0Zr4e8QxtumuM= Both MT8195 clock controllers dt-bindings (clock and sys-clock) document the '#clock-cells' property but do not enforce it as required property. As clock provider nodes should define this property in devicetrees, add it to the required property list in both its dt-bindings files. Fixes: 34d3ed3b9a00 ("dt-bindings: ARM: Mediatek: Add new document bindings of MT8195 clock") Acked-by: Conor Dooley Reviewed-by: AngeloGioacchino Del Regno Signed-off-by: Louis-Alexis Eyraud --- Documentation/devicetree/bindings/clock/mediatek,mt8195-clock.yaml | 1 + Documentation/devicetree/bindings/clock/mediatek,mt8195-sys-clock.yaml | 1 + 2 files changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/clock/mediatek,mt8195-clock.yaml b/Documentation/devicetree/bindings/clock/mediatek,mt8195-clock.yaml index fcc963aff087..94dd29c2396c 100644 --- a/Documentation/devicetree/bindings/clock/mediatek,mt8195-clock.yaml +++ b/Documentation/devicetree/bindings/clock/mediatek,mt8195-clock.yaml @@ -58,6 +58,7 @@ properties: required: - compatible - reg + - '#clock-cells' additionalProperties: false diff --git a/Documentation/devicetree/bindings/clock/mediatek,mt8195-sys-clock.yaml b/Documentation/devicetree/bindings/clock/mediatek,mt8195-sys-clock.yaml index 69f096eb168d..ba1b36fa0169 100644 --- a/Documentation/devicetree/bindings/clock/mediatek,mt8195-sys-clock.yaml +++ b/Documentation/devicetree/bindings/clock/mediatek,mt8195-sys-clock.yaml @@ -43,6 +43,7 @@ properties: required: - compatible - reg + - '#clock-cells' additionalProperties: false -- 2.55.0