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Only touches comments, no code changes. Assisted-by: Cursor:claude-opus-5 Signed-off-by: Hemanth Selam --- drivers/hwtracing/coresight/coresight-catu.c | 6 +++--- drivers/hwtracing/coresight/coresight-core.c | 2 +- drivers/hwtracing/coresight/coresight-etm4x-core.c | 2 +- drivers/hwtracing/coresight/coresight-tmc-etr.c | 2 +- drivers/hwtracing/coresight/coresight-trbe.c | 2 +- include/linux/coresight.h | 2 +- 6 files changed, 8 insertions(+), 8 deletions(-) diff --git a/drivers/hwtracing/coresight/coresight-catu.c b/drivers/hwtracing/coresight/coresight-catu.c index ad8dafea7d2f..59932f23b6ee 100644 --- a/drivers/hwtracing/coresight/coresight-catu.c +++ b/drivers/hwtracing/coresight/coresight-catu.c @@ -45,7 +45,7 @@ struct catu_etr_buf { * ------------------------------------ * * Where bit[0] V indicates if the address is valid or not. - * Each 4K table pages have upto 256 data page pointers, taking upto 2K + * Each 4K table pages have up to 256 data page pointers, taking up to 2K * size. There are two Link pointers, pointing to the previous and next * table pages respectively at the end of the 4K page. (i.e, entry 510 * and 511). @@ -202,7 +202,7 @@ catu_populate_table(struct tmc_sg_table *catu_table) /* * The @offset is always 1M aligned here and we have an * empty table @table_ptr to fill. Each table can address - * upto 1MB data buffer. The last table may have fewer + * up to 1MB data buffer. The last table may have fewer * entries if the buffer size is not aligned. */ table_end = (offset + SZ_1M) < buf_size ? @@ -263,7 +263,7 @@ catu_init_sg_table(struct device *catu_dev, int node, struct tmc_sg_table *catu_table; /* - * Each table can address upto 1MB and we can have + * Each table can address up to 1MB and we can have * CATU_PAGES_PER_SYSPAGE tables in a system page. */ nr_tpages = DIV_ROUND_UP(size, CATU_PAGES_PER_SYSPAGE * SZ_1M); diff --git a/drivers/hwtracing/coresight/coresight-core.c b/drivers/hwtracing/coresight/coresight-core.c index 6d65c43d574f..bcc655933d35 100644 --- a/drivers/hwtracing/coresight/coresight-core.c +++ b/drivers/hwtracing/coresight/coresight-core.c @@ -200,7 +200,7 @@ struct coresight_device *coresight_get_source(struct coresight_path *path) * @src: The source device of the trace path * @conn: The connection of one outport * - * Return false if the connection doesn't have a source binded or source of the + * Return false if the connection doesn't have a source bound or source of the * path matches the source binds to connection. */ static bool coresight_blocks_source(struct coresight_device *src, diff --git a/drivers/hwtracing/coresight/coresight-etm4x-core.c b/drivers/hwtracing/coresight/coresight-etm4x-core.c index 2247ad55d444..8182a8298306 100644 --- a/drivers/hwtracing/coresight/coresight-etm4x-core.c +++ b/drivers/hwtracing/coresight/coresight-etm4x-core.c @@ -338,7 +338,7 @@ static void etm4_hisi_config_core_commit(bool enable) * bit 12 and 13 of HISI_HIP08_CORE_COMMIT_REG are used together * to set core-commit, 2'b00 means cpu is at full speed, 2'b01, * 2'b10, 2'b11 mean reduce pipeline speed, and 2'b01 means level-1 - * speed(minimun value). So bit 12 and 13 should be cleared together. + * speed(minimum value). So bit 12 and 13 should be cleared together. */ val = read_sysreg_s(HISI_HIP08_CORE_COMMIT_REG); val &= ~HISI_HIP08_CORE_COMMIT_MASK; diff --git a/drivers/hwtracing/coresight/coresight-tmc-etr.c b/drivers/hwtracing/coresight/coresight-tmc-etr.c index 361a433e6f0c..91fc18947eb1 100644 --- a/drivers/hwtracing/coresight/coresight-tmc-etr.c +++ b/drivers/hwtracing/coresight/coresight-tmc-etr.c @@ -352,7 +352,7 @@ EXPORT_SYMBOL_GPL(tmc_alloc_sg_table); /* * tmc_sg_table_sync_data_range: Sync the data buffer written - * by the device from @offset upto a @size bytes. + * by the device from @offset up to a @size bytes. */ void tmc_sg_table_sync_data_range(struct tmc_sg_table *table, u64 offset, u64 size) diff --git a/drivers/hwtracing/coresight/coresight-trbe.c b/drivers/hwtracing/coresight/coresight-trbe.c index c7cbca45f2de..fc1a27c5a436 100644 --- a/drivers/hwtracing/coresight/coresight-trbe.c +++ b/drivers/hwtracing/coresight/coresight-trbe.c @@ -706,7 +706,7 @@ static unsigned long trbe_get_trace_size(struct perf_output_handle *handle, * wrapped and should be treated as limit. * * When the TRBE is affected by TRBE_WORKAROUND_WRITE_OUT_OF_RANGE, - * it may write upto 64bytes beyond the "LIMIT". The driver already + * it may write up to 64bytes beyond the "LIMIT". The driver already * keeps a valid page next to the LIMIT and we could potentially * consume the trace data that may have been collected there. But we * cannot be really sure it is available, and the TRBPTR may not diff --git a/include/linux/coresight.h b/include/linux/coresight.h index ddf18c970e34..2137bc18ff93 100644 --- a/include/linux/coresight.h +++ b/include/linux/coresight.h @@ -320,7 +320,7 @@ struct coresight_device { * @nr_idx: Number of entries already allocated. * @pfx: Prefix pattern for device name. * @fwnode_list: Array of fwnode_handles associated with each allocated - * index, upto nr_idx entries. + * index, up to nr_idx entries. */ struct coresight_dev_list { struct list_head node; -- 2.48.1