From: Hemanth Selam <hemanth.selam@gmail.com>
To: Jonas Bonn <jonas@southpole.se>,
Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>,
Stafford Horne <shorne@gmail.com>
Cc: linux-kernel@vger.kernel.org, linux-openrisc@vger.kernel.org
Subject: [PATCH] openrisc: fix typos in comments
Date: Fri, 4 Sep 2026 17:27:17 +0530 [thread overview]
Message-ID: <20260904115718.12338-1-hemanth.selam@gmail.com> (raw)
Fix typos in comments, reported by scripts/checkpatch.pl using the
misspelling list in scripts/spelling.txt. Only touches comments, no code
changes.
Assisted-by: Cursor:claude-opus-5
Signed-off-by: Hemanth Selam <hemanth.selam@gmail.com>
---
arch/openrisc/kernel/entry.S | 6 +++---
arch/openrisc/kernel/head.S | 4 ++--
2 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/arch/openrisc/kernel/entry.S b/arch/openrisc/kernel/entry.S
index 18e68680471e..0aade79e796a 100644
--- a/arch/openrisc/kernel/entry.S
+++ b/arch/openrisc/kernel/entry.S
@@ -231,7 +231,7 @@ handler: ;\
/*
* NOTE: one should never assume that SPR_EPC, SPR_ESR, SPR_EEAR
* contain the same values as when exception we're handling
- * occured. in fact they never do. if you need them use
+ * occurred. in fact they never do. if you need them use
* values saved on stack (for SPR_EPC, SPR_ESR) or content
* of r4 (for SPR_EEAR). for details look at EXCEPTION_HANDLE()
* in 'arch/openrisc/kernel/head.S'
@@ -1056,8 +1056,8 @@ ENTRY(ret_from_fork)
*/
-/* _switch MUST never lay on page boundry, cause it runs from
- * effective addresses and beeing interrupted by iTLB miss would kill it.
+/* _switch MUST never lay on page boundary, cause it runs from
+ * effective addresses and being interrupted by iTLB miss would kill it.
* dTLB miss seems to never accour in the bad place since data accesses
* are from task structures which are always page aligned.
*
diff --git a/arch/openrisc/kernel/head.S b/arch/openrisc/kernel/head.S
index d5befd632fa9..60840dd109d2 100644
--- a/arch/openrisc/kernel/head.S
+++ b/arch/openrisc/kernel/head.S
@@ -91,7 +91,7 @@
#endif
/*
- * TLB miss handlers temorary stores
+ * TLB miss handlers temporary stores
*/
#ifdef CONFIG_OPENRISC_HAVE_SHADOW_GPRS
#define EXCEPTION_STORE_GPR2 l.mtspr r0,r2,SPR_SHADOW_GPR(2)
@@ -194,7 +194,7 @@
*
* PRMS: handler - a function to jump to. it has to save the
* remaining registers to kernel stack, call
- * appropriate arch-independant exception handler
+ * appropriate arch-independent exception handler
* and finaly jump to ret_from_except
*
* PREQ: unchanged state from the time exception happened
--
2.48.1
next reply other threads:[~2026-09-04 11:57 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-04 11:57 Hemanth Selam [this message]
-- strict thread matches above, loose matches on Subject: below --
2022-04-30 19:11 Julia Lawall
2022-04-30 22:42 ` Stafford Horne
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