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[159.2.239.150]) by smtp.gmail.com with ESMTPSA id 6a1803df08f44-910406481b4sm27434626d6.17.2026.09.04.12.06.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 04 Sep 2026 12:06:26 -0700 (PDT) Received: from jgg by wakko with local (Exim 4.97) (envelope-from ) id 1x2ZF3-00000002uJq-3KUc; Fri, 04 Sep 2026 16:06:25 -0300 Date: Fri, 4 Sep 2026 16:06:25 -0300 From: Jason Gunthorpe To: Samiullah Khawaja Cc: Nicolin Chen , Alex Williamson , "Tian, Kevin" , kvm , Alex Williamson , Bjorn Helgaas , linux-kernel , linux-pci , iommu@lists.linux.dev Subject: Re: [RFC PATCH 1/5] PCI: Refuse function reset of an SR-IOV PF with enabled VFs Message-ID: <20260904190625.GA667892@ziepe.ca> References: <20260812045325.2733631-2-alex.williamson@nvidia.com> <20260814083737.66bb83fb@nvidia.com> <20260817121810.GC933791@ziepe.ca> <20260818140304.GC5482@ziepe.ca> <20260818143906.1f58aecb@nvidia.com> <20260820233722.GA1110819@ziepe.ca> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: On Fri, Aug 21, 2026 at 02:20:55AM +0000, Samiullah Khawaja wrote: > On Thu, Aug 20, 2026 at 08:37:22PM -0300, Jason Gunthorpe wrote: > > On Thu, Aug 20, 2026 at 10:38:07PM +0000, Samiullah Khawaja wrote: > > > > > > The blocking domain operation looks like it might be simplest to > > > > implement in the IOMMU core. We can set a flag for a default blocking > > > > domain on the IOMMU group when we take_dma_ownership of the group. Then > > > > release_dma_ownership picks the blocking rather than default domain. > > > > > > > > This is then unwound in use_default_domain, called via dma_configure, > > > > attaching the device to the default domain in probe of the next driver. > > > > Therefore until probe by another driver, a device used by vfio would > > > > remain in a blocking domain even while unused and unbound. > > > > > > The devices are expected to be attached to the default_domain even when > > > these are unbound and the use_default_domain assumes that, and it only > > > checks the ownership and doesn't switch the domain to default_domain. I > > > guess we should add a WARN in use_default_domain() if that is not true. > > > I will probably send out a patch for that separately. > > > > > > I think we can move the device back to default_domain after reset after > > > unbind, maybe it can be done in pci_dma_cleanup() based on > > > driver_managed_dma? > > > > This blocking domain stuff sounds very similar to what Nicolin > > implemented for the per-function ATS issue? > > I see you are talking about this invalidation stuff: > > https://lore.kernel.org/all/348c50ab6e95b5ec6d48ee3fa05d529a784a34c3.1765834788.git.nicolinc@nvidia.com/ > > But this was the case where the device is going to be reset and to > prevent ATS issues, we attach it to blocking domain before doing the > reset. But of course, with the PF reset here, it induces the same kind > of ATS issues on the VFs. Yes, we need to attach a blocking domain before we make the function unable to respond to ATC invalidation. PF or VF reset both trigger this condition. > Hmm... doing that for SRIOV also, by allowing PF reset but attaching the > VFs to blocking domains before the PF is reset, will only resolve the > ATS issues. But the software state is still out of sync with hardware > state. Sure, it doesn't fix everything, but it is something you'd need to do to avoid problems in the iommu driver side.. Jason