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From: Conor Dooley <conor@kernel.org>
To: Marcelo Schmitt <marcelo.schmitt1@gmail.com>
Cc: Marcelo Schmitt <marcelo.schmitt@analog.com>,
	linux-iio@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, linux@analog.com, jic23@kernel.org,
	nuno.sa@analog.com, dlechner@baylibre.com, andy@kernel.org,
	Michael.Hennerich@analog.com, robh@kernel.org,
	krzk+dt@kernel.org, conor+dt@kernel.org, corbet@lwn.net,
	skhan@linuxfoundation.org
Subject: Re: [PATCH v1 08/13] dt-bindings: iio: adc: adi,ad4134: Document SPI connection mode
Date: Mon, 7 Sep 2026 18:52:59 +0100	[thread overview]
Message-ID: <20260907-spectator-venomous-7528abe370d8@spud> (raw)
In-Reply-To: <aptA9HP82-ss45JF@debian-BULLSEYE-live-builder-AMD64>

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On Fri, Sep 04, 2026 at 07:06:44PM -0300, Marcelo Schmitt wrote:
> On 09/04, Marcelo Schmitt wrote:
> > On 09/03, Conor Dooley wrote:
> > > On Wed, Sep 02, 2026 at 02:24:02PM -0300, Marcelo Schmitt wrote:
> > > > Document how AD4134 chips are connected to the host SPI controller
> > > > according to different wiring configurations.
> > > > 
> > > > Signed-off-by: Marcelo Schmitt <marcelo.schmitt@analog.com>
> > > > ---
> > > >  .../bindings/iio/adc/adi,ad4134.yaml          | 22 +++++++++++++++++++
> > > >  1 file changed, 22 insertions(+)
> > > > 
> > > > diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad4134.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad4134.yaml
> > > > index ea6d7e026419..d843c02a394a 100644
> > > > --- a/Documentation/devicetree/bindings/iio/adc/adi,ad4134.yaml
> > > > +++ b/Documentation/devicetree/bindings/iio/adc/adi,ad4134.yaml
> > > > @@ -131,6 +131,28 @@ properties:
> > > >      enum: [ free-running, gated ]
> > > >      default: gated
> > > >  
> > > > +  adi,spi-mode:
> > > > +    $ref: /schemas/types.yaml#/definitions/string
> > > > +    enum: [ no-cs, 4-wire, one-channel-chain, two-channel-chain ]
> > > > +    description: |
> > > > +      This property indicates the SPI wiring configuration.
> > > > +
> > > > +      When this property is omitted, it is assumed that the device is using
> > > > +      'no-cs' wiring. When this property is present, it indicates that the
> > > > +      device is using one of the following wiring configurations:
> > > 
> > ...
> > > I'd also really appreciate a dts example for a system
> > > with one-channel-chain or two-channel-chain looks, given the second
> > > device may require different supplies etc. I have no impression in my
> > > head of how the dt would be constructed, so I'd like to see wht you have
> > > in mind.
> > 
> ...
> 
> Realized what I said doesn't make much sense. The peripherals can all have
> the same configuration and thus share CS, SCLK, and controller SDO. The wiring
> would be like the following
> 
> ::
> 
>   +-----------------------+                               +-----------------+
>   |         AD4134        |                               | SPI Controller  |
>   |                       |                               |                 |
>   |                       |                               |                 |
>   | SPI interface    SCLK |<--------------------+---------| SCLK            |
>   | for register       CS |<--------------------|-+-------| CS              |
>   | access            SDI |<--------------------|-|-+-----| SDO             |
>   |                   SDO |------->|¯¯¯¯\       | | |     |                 |
>   |                       |        |MUX  >------|-|-|---->| SDI0            |
>   | Data interface  DOUT0 |------->|____/<------|-|-|---- | GPIO            |
>   | for ADC sample  DOUT1 |---------------------|-|-|---->| SDI1            |
>   | data read        DCLK |<-------------+------|-|-|-----| DCLK            |
>   |                 DOUT2 |<-+           |      | | |     |                 |
>   |                 DOUT3 |<-|-+         |      | | |     |                 |
>   |                   ODR |<-|-|---------|--+   | | |  +->| Offload Trigger |
>   +-----------------------+  | |         |  |   | | |  |  +-----------------+
>                              | |         |  |   | | |  +--| PWM1            |
>                              | |         |  +---| | | ----| PWM0            |
>                              | |         |  |   | | |    +-----------------+
>                              | |         |  |   | | |
>   +-----------------------+  | |         |  |   | | |
>   |         AD4134        |  | |         |  |   | | |
>   |                       |  | |         |  |   | | |
>   | SPI interface         |  | |         |  |   | | |
>   | for register     SCLK |<-|-|---------|--|---+ | |
>   | access             CS |<-|-|---------|--|---|-+ |
>   |                   SDI |<-|-|---------|--|---|-|-+
>   |                   SDO |  | |         |  |   | | |
>   | Data interface        |  | |         |  |   | | |
>   | for ADC sample  DOUT0 |--+ |         |  |   | | |
>   | data read       DOUT1 |----+         |  |   | | |
>   |                 DOUT2 |<-+           |  |   | | |
>   |                 DOUT3 |<-|-+         |  |   | | |
>   |                  DCLK |<-|-|---------+  |   | | |
>   |                   ODR |<-|-|---------|--+   | | |
>   +-----------------------+  | |         |  |   | | |
>                              | |         |  |   | | |
>                              | |         |  |   | | |
>                              | |         |  |   | | |
>   +-----------------------+  | |         |  |   | | |
>   |         AD4134        |  | |         |  |   | | |
>   |                       |  | |         |  |   | | |
>   |                       |  | |         |  |   | | |
>   | SPI interface    SCLK |<-|-|---------|--|---+ | |
>   | for register       CS |<-|-|---------|--|-----+ |
>   | access            SDI |<-|-|---------|--|-------+
>   |                       |  | |         |  |
>   | Data interface        |  | |         |  |
>   | for ADC sample  DOUT0 |--+ |         |  |
>   | data read       DOUT1 |----+         |  |
>   |                 DOUT2 |              |  |
>   |                 DOUT3 |              |  |
>   |                  DCLK |<-------------+  |
>   |                   ODR |<----------------+
>   +-----------------------+
> 
> 
> So we would set them as only one daisy-chained device.
> 
>     spi {
>         ...
>         adc@0 {
>             compatible = "adi,ad4134";
>             reg = <0>;
>             spi-rx-bus-width = <1>, <1>; /* 2 lanes of 1 bit each */
> 
>             <supplies, clock, and other properties ...> 
> 
>             #daisy-chained-devices = <2>;

Does this property actually provide value here? I assume it does because
otherwise you don't know how many devices there are.

>             adi,spi-mode = "two-channel-chain";

How does this interact with spi-rx-bus-width? Is the value of this
consistent with adi,spi-mode? IOW, for adi,spi-mode = "one.." will there
only ever be Dout0 connected to the host and for adi,spi-mode = "two.."
will Dout1 and Dout0 both be connected?


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  parent reply	other threads:[~2026-09-07 17:53 UTC|newest]

Thread overview: 35+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-09-02 17:21 [PATCH v1 00/13] iio: adc: ad4134: Enable greater sample rate data capture Marcelo Schmitt
2026-09-02 17:21 ` [PATCH v1 01/13] iio: Fix typo in vendor name Marcelo Schmitt
2026-09-03  6:22   ` Andy Shevchenko
2026-09-04 19:41     ` Marcelo Schmitt
2026-09-05  7:40       ` Andy Shevchenko
2026-09-05  7:41         ` Andy Shevchenko
2026-09-02 17:21 ` [PATCH v1 02/13] iio: adc: ad4134: Drop import to empty name space Marcelo Schmitt
2026-09-02 17:22 ` [PATCH v1 03/13] iio: adc: ad4134: Update include list to comply with IWYU principles Marcelo Schmitt
2026-09-03  6:26   ` Andy Shevchenko
2026-09-02 17:22 ` [PATCH v1 04/13] iio: adc: ad4134: Serialize single-read operations Marcelo Schmitt
2026-09-03  6:27   ` Andy Shevchenko
2026-09-06 18:50     ` Jonathan Cameron
2026-09-02 17:23 ` [PATCH v1 05/13] iio: adc: ad4134: Run shorter transfers when CRC is disabled Marcelo Schmitt
2026-09-02 17:23 ` [PATCH v1 06/13] iio: adc: ad4134: Add support for digital filter type selection Marcelo Schmitt
2026-09-03  6:31   ` Andy Shevchenko
2026-09-02 17:23 ` [PATCH v1 07/13] iio: adc: ad4134: Support buffered data read Marcelo Schmitt
2026-09-02 17:24 ` [PATCH v1 08/13] dt-bindings: iio: adc: adi,ad4134: Document SPI connection mode Marcelo Schmitt
2026-09-03 18:14   ` Conor Dooley
2026-09-04 20:47     ` Marcelo Schmitt
2026-09-04 22:06       ` Marcelo Schmitt
2026-09-06 19:26         ` Jonathan Cameron
2026-09-09 15:17           ` Marcelo Schmitt
2026-09-14  0:34             ` Jonathan Cameron
2026-09-07 17:52         ` Conor Dooley [this message]
2026-09-10 22:19           ` Marcelo Schmitt
2026-09-15 14:06             ` Conor Dooley
2026-09-06 19:15       ` Jonathan Cameron
2026-09-02 17:24 ` [PATCH v1 09/13] iio: adc: ad4134: Support SPI 4-wire mode Marcelo Schmitt
2026-09-03  6:39   ` Andy Shevchenko
2026-09-02 17:24 ` [PATCH v1 10/13] dt-bindings: iio: adc: adi,ad4134: Document PWM usage Marcelo Schmitt
2026-09-04 15:53   ` Conor Dooley
2026-09-02 17:25 ` [PATCH v1 11/13] dt-bindings: iio: adc: adi,ad4134: Add high data throughput example Marcelo Schmitt
2026-09-02 17:25 ` [PATCH v1 12/13] iio: adc: ad4134: Support high-speed data capture Marcelo Schmitt
2026-09-03  7:00   ` Andy Shevchenko
2026-09-02 17:25 ` [PATCH v1 13/13] Docs: iio: Add AD4134 Marcelo Schmitt

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