From: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com>
To: Marek Vasut <marex@denx.de>,
Andrzej Hajda <andrzej.hajda@intel.com>,
Neil Armstrong <neil.armstrong@linaro.org>,
Robert Foss <rfoss@kernel.org>,
Laurent Pinchart <Laurent.pinchart@ideasonboard.com>,
Jonas Karlman <jonas@kwiboo.se>,
Jernej Skrabec <jernej.skrabec@gmail.com>,
Maarten Lankhorst <maarten.lankhorst@linux.intel.com>,
Maxime Ripard <mripard@kernel.org>,
Thomas Zimmermann <tzimmermann@suse.de>,
David Airlie <airlied@gmail.com>,
Simona Vetter <simona@ffwll.ch>
Cc: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org,
Dave Stevenson <dave.stevenson@raspberrypi.com>,
Tomi Valkeinen <tomi.valkeinen@ideasonboard.com>
Subject: [PATCH v4 04/13] drm/bridge: tc358762: Configure SYSCTRL first
Date: Mon, 07 Sep 2026 14:27:59 +0300 [thread overview]
Message-ID: <20260907-tc358762-fixes-v4-4-e3fc3ab5cd83@ideasonboard.com> (raw)
In-Reply-To: <20260907-tc358762-fixes-v4-0-e3fc3ab5cd83@ideasonboard.com>
SYSCTRL affects the DPI output and the clock tree, but we configure it
late, when the DPI output is already enabled and clocks are running.
Move the SYSCTRL configuration to the beginning, before anything is
enabled.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com>
---
drivers/gpu/drm/bridge/tc358762.c | 14 +++++++-------
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/bridge/tc358762.c b/drivers/gpu/drm/bridge/tc358762.c
index fcd741f5765d..eb6e6ad5b6a1 100644
--- a/drivers/gpu/drm/bridge/tc358762.c
+++ b/drivers/gpu/drm/bridge/tc358762.c
@@ -134,6 +134,13 @@ static int tc358762_init(struct tc358762 *ctx)
{
u32 lcdctrl;
+ tc358762_write(ctx, SYSCTRL,
+ FIELD_PREP(SYSCTRL_DPIDATA_IO_MASK, SYSCTRL_DPIDATA_IO_4MA) |
+ FIELD_PREP(SYSCTRL_DPISTB_IO_MASK, SYSCTRL_DPISTB_IO_4MA) |
+ FIELD_PREP(SYSCTRL_PCLKDIV_MASK, SYSCTRL_PCLKDIV_DIV_3));
+
+ msleep(100);
+
tc358762_write(ctx, DSI_LANEENABLE,
DSI_LANEENABLE_L0EN | DSI_LANEENABLE_CLEN);
tc358762_write(ctx, PPI_D0S_CLRSIPOCOUNT, 5);
@@ -157,13 +164,6 @@ static int tc358762_init(struct tc358762 *ctx)
tc358762_write(ctx, LCDCTRL, lcdctrl);
- tc358762_write(ctx, SYSCTRL,
- FIELD_PREP(SYSCTRL_DPIDATA_IO_MASK, SYSCTRL_DPIDATA_IO_4MA) |
- FIELD_PREP(SYSCTRL_DPISTB_IO_MASK, SYSCTRL_DPISTB_IO_4MA) |
- FIELD_PREP(SYSCTRL_PCLKDIV_MASK, SYSCTRL_PCLKDIV_DIV_3));
-
- msleep(100);
-
tc358762_write(ctx, PPI_STARTPPI, PPI_STARTPPI_STARTPPI);
tc358762_write(ctx, DSI_STARTDSI, DSI_STARTDSI_STARTDSI);
--
2.43.0
next prev parent reply other threads:[~2026-09-07 11:28 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-07 11:27 [PATCH v4 00/13] drm/bridge: tc358762: Various small fixes Tomi Valkeinen
2026-09-07 11:27 ` [PATCH v4 01/13] drm/bridge: tc358762: Clean up register defines Tomi Valkeinen
2026-09-07 11:27 ` [PATCH v4 02/13] drm/bridge: tc358762: Improve SYSCTRL " Tomi Valkeinen
2026-09-07 11:27 ` [PATCH v4 03/13] drm/bridge: tc358762: Improve LCDCTRL defines Tomi Valkeinen
2026-09-07 11:27 ` Tomi Valkeinen [this message]
2026-09-07 11:28 ` [PATCH v4 05/13] drm/bridge: tc358762: Drop SPICMR write Tomi Valkeinen
2026-09-07 11:28 ` [PATCH v4 06/13] drm/bridge: tc358762: Improve DPI enable handling Tomi Valkeinen
2026-09-07 11:28 ` [PATCH v4 07/13] drm/bridge: tc358762: Update comment about the number of lanes Tomi Valkeinen
2026-09-07 11:28 ` [PATCH v4 08/13] drm/bridge: tc358762: Support VTG Tomi Valkeinen
2026-09-07 11:28 ` [PATCH v4 09/13] drm/bridge: tc358762: Fix sync polarities Tomi Valkeinen
2026-09-07 11:28 ` [PATCH v4 10/13] drm/bridge: tc358762: Move tc358762_init() into tc358762_enable() Tomi Valkeinen
2026-09-07 11:28 ` [PATCH v4 11/13] drm/bridge: tc358762: Drop drm_bridge_funcs.mode_set Tomi Valkeinen
2026-09-07 11:28 ` [PATCH v4 12/13] drm/bridge: tc358762: Set DE_POL and DCLK_POL properly Tomi Valkeinen
2026-09-07 11:28 ` [PATCH v4 13/13] drm/panel-simple: Fix powertip,ph800480t013-idf02 timings Tomi Valkeinen
2026-09-10 12:20 ` [PATCH v4 00/13] drm/bridge: tc358762: Various small fixes Andreas Kemnade
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