From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id CB4FD233941 for ; Mon, 7 Sep 2026 03:50:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788753061; cv=none; b=s1MQypnYtnq5B4XcE2tc9GQCorQQBbt0flq6oC9BXECrBZLHcizQZ4PN5D1wS6GDNB2WiJ7Cn4dYhpMUmpoYvD4r8vX/bTxrjfcUSb9f8tBIoO8icPPrWf3h42ZQxjaswqgnLkBG1WtBIpSM3xOYP8xd3GNm0ImLI3C998RiVNc= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1788753061; c=relaxed/simple; bh=qFNA6gQd3R3/N1F2NlRNUpaGJ73aKIkK2svQU86ktVQ=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=dYZiOHrYbCMTFDFvJzf6annT5OQF1TvqAave7WnUe2HUa+QpjPfsWpiMn0dvQp7glRf8z1djqX3Yzx5bAFGwhLML2/Q0MFTgdi8/Xb7Cv+fztPdADTkq6ROwiJ5k8+YqqUBW4qnrBc/ROWzlYMxTgAL7dzwjQR0yfFhGHFeoXN0= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b=gaU3xvQi; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=arm.com header.i=@arm.com header.b="gaU3xvQi" Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id AA7631AED; Sun, 6 Sep 2026 20:50:53 -0700 (PDT) Received: from localhost (a085714.arm.com [10.164.19.28]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id A13643F7B4; Sun, 6 Sep 2026 20:50:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1788753057; bh=qFNA6gQd3R3/N1F2NlRNUpaGJ73aKIkK2svQU86ktVQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=gaU3xvQiDu0CvOWTMdlZQxYVQh/R/CHFyGgjq84fexhBOg1L9rxB+4w8ipcOCDa1Z E2Cs2eyqqBmiDulIGwNs832s30G8mh9bsgmEeCfvO6JqFbe7FWVnXIuS+NfF1Ekr8J yuvc0+cRZZKX6wwRSyT/+18yuMQL5X7/LgDl8Vkg= From: Anshuman Khandual To: linux-arm-kernel@lists.infradead.org Cc: Anshuman Khandual , Catalin Marinas , Will Deacon , Ryan Roberts , Mark Rutland , Lorenzo Stoakes , Andrew Morton , David Hildenbrand , Mike Rapoport , Linu Cherian , linux-kernel@vger.kernel.org, linux-mm@kvack.org Subject: [PATCH V2 06/14] arm64/mm: Enable fixmap with 5 level page table Date: Mon, 7 Sep 2026 09:20:21 +0530 Message-ID: <20260907035030.2839978-7-anshuman.khandual@arm.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260907035030.2839978-1-anshuman.khandual@arm.com> References: <20260907035030.2839978-1-anshuman.khandual@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit FEAT_D128 halves PTRS_PER_PXX thus shrinking the VA range coverage for each page table level. Hence in order to preserve all existing VA range configurations, some geometry now need to become 5-level. Since fixmap is used to build and manipulate page tables early on during boot the mapping must also gain that additional level which was not required earlier. Enable fixmap with 5 level page table when required. This creates table entries at the PGD level. Add a fallback stub for pgd_page_paddr() when (PGTBALE_LEVELS <= 4) which helps in intercepting any unintended usage. Cc: Catalin Marinas Cc: Will Deacon Cc: Ryan Roberts Cc: Mark Rutland Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Anshuman Khandual --- arch/arm64/include/asm/pgtable.h | 1 + arch/arm64/mm/fixmap.c | 18 +++++++++++++++--- 2 files changed, 16 insertions(+), 3 deletions(-) diff --git a/arch/arm64/include/asm/pgtable.h b/arch/arm64/include/asm/pgtable.h index 2b457db19be0..7a5d6a14bb52 100644 --- a/arch/arm64/include/asm/pgtable.h +++ b/arch/arm64/include/asm/pgtable.h @@ -1178,6 +1178,7 @@ static inline p4d_t *p4d_offset_kimg(pgd_t *pgdp, u64 addr) #else static inline bool pgtable_l5_enabled(void) { return false; } +#define pgd_page_paddr(pgd) ({ BUILD_BUG(); 0; }) #define p4d_index(addr) (((addr) >> P4D_SHIFT) & (PTRS_PER_P4D - 1)) diff --git a/arch/arm64/mm/fixmap.c b/arch/arm64/mm/fixmap.c index 2a0fe0b0f771..5512521fef8f 100644 --- a/arch/arm64/mm/fixmap.c +++ b/arch/arm64/mm/fixmap.c @@ -34,6 +34,7 @@ static_assert(NR_BM_PMD_TABLES == 1); static pte_t bm_pte[NR_BM_PTE_TABLES][PTRS_PER_PTE] __bss_pgtbl; static pmd_t bm_pmd[PTRS_PER_PMD] __bss_pgtbl __maybe_unused; static pud_t bm_pud[PTRS_PER_PUD] __bss_pgtbl __maybe_unused; +static p4d_t bm_p4d[PTRS_PER_P4D] __bss_pgtbl __maybe_unused; static inline pte_t *fixmap_pte(unsigned long addr) { @@ -95,6 +96,19 @@ static void __init early_fixmap_init_pud(p4d_t *p4dp, unsigned long addr, early_fixmap_init_pmd(pudp, addr, end); } +static void __init early_fixmap_init_p4d(pgd_t *pgdp, unsigned long addr, + unsigned long end) +{ + pgd_t pgd = pgdp_get(pgdp); + p4d_t *p4dp; + + if (pgd_none(pgd)) + __pgd_populate(pgdp, __pa_symbol(bm_p4d), + PGD_TYPE_TABLE | PGD_TABLE_AF); + p4dp = p4d_offset_kimg(pgdp, addr); + early_fixmap_init_pud(p4dp, addr, end); +} + /* * The p*d_populate functions call virt_to_phys implicitly so they can't be used * directly on kernel symbols (bm_p*d). This function is called too early to use @@ -107,9 +121,7 @@ void __init early_fixmap_init(void) unsigned long end = FIXADDR_TOP; pgd_t *pgdp = pgd_offset_k(addr); - p4d_t *p4dp = p4d_offset_kimg(pgdp, addr); - - early_fixmap_init_pud(p4dp, addr, end); + early_fixmap_init_p4d(pgdp, addr, end); } /* -- 2.43.0