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([183.91.15.56]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2db14ae85eesm43064815ad.82.2026.09.07.05.03.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 07 Sep 2026 05:04:02 -0700 (PDT) From: phucduc.bui@gmail.com To: Mark Brown , Matthias Brugger Cc: Liam Girdwood , AngeloGioacchino Del Regno , Jaroslav Kysela , Takashi Iwai , Cezary Rojewski , Kees Cook , Kuninori Morimoto , Trevor Wu , Douglas Anderson , linux-sound@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org, bui duc phuc Subject: [PATCH 5/7] ASoC: mediatek: mt8188: mt8188-afe-pcm: Handle runtime resume errors Date: Mon, 7 Sep 2026 19:03:08 +0700 Message-ID: <20260907120310.135693-6-phucduc.bui@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260907120310.135693-1-phucduc.bui@gmail.com> References: <20260907120310.135693-1-phucduc.bui@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit From: bui duc phuc Errors from clock enable and regcache synchronization are currently ignored during runtime resume. Check the return values from mt8188_afe_enable_reg_rw_clk(), regcache_sync(), and mt8188_afe_enable_main_clock(), and abort the runtime resume if any of them fails. On failure, disable the previously enabled reg_rw clocks and restore the regmap to cache-only mode. Fixes: bf106bf09376 ("ASoC: mediatek: mt8188: add platform driver") Signed-off-by: bui duc phuc --- sound/soc/mediatek/mt8188/mt8188-afe-pcm.c | 21 ++++++++++++++++----- 1 file changed, 16 insertions(+), 5 deletions(-) diff --git a/sound/soc/mediatek/mt8188/mt8188-afe-pcm.c b/sound/soc/mediatek/mt8188/mt8188-afe-pcm.c index 7b1f5d05f4d6..f8cbe7bac36d 100644 --- a/sound/soc/mediatek/mt8188/mt8188-afe-pcm.c +++ b/sound/soc/mediatek/mt8188/mt8188-afe-pcm.c @@ -3030,22 +3030,33 @@ static int mt8188_afe_runtime_resume(struct device *dev) struct mtk_base_afe *afe = dev_get_drvdata(dev); struct mt8188_afe_private *afe_priv = afe->platform_priv; struct arm_smccc_res res; + int ret; arm_smccc_smc(MTK_SIP_AUDIO_CONTROL, MTK_AUDIO_SMC_OP_DOMAIN_SIDEBANDS, 0, 0, 0, 0, 0, 0, &res); - mt8188_afe_enable_reg_rw_clk(afe); + ret = mt8188_afe_enable_reg_rw_clk(afe); + if (ret) + return ret; if (!afe->regmap || afe_priv->pm_runtime_bypass_reg_ctl) - goto skip_regmap; + return 0; regcache_cache_only(afe->regmap, false); - regcache_sync(afe->regmap); + ret = regcache_sync(afe->regmap); + if (ret) + goto err; + + ret = mt8188_afe_enable_main_clock(afe); + if (ret) + goto err; - mt8188_afe_enable_main_clock(afe); -skip_regmap: return 0; +err: + mt8188_afe_disable_reg_rw_clk(afe); + regcache_cache_only(afe->regmap, true); + return ret; } static int init_memif_priv_data(struct mtk_base_afe *afe) -- 2.43.0