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Tue, 08 Sep 2026 02:08:13 -0700 (PDT) Received: from wenst-7875.tpe.corp.google.com ([2a00:79e0:201d:8:e541:8c2f:4ce9:823a]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-39b4b72f62esm19718804a91.5.2026.09.08.02.08.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 08 Sep 2026 02:08:11 -0700 (PDT) From: Chen-Yu Tsai To: Liu Ying , Laurentiu Palcu , Lucas Stach , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann Cc: Chen-Yu Tsai , David Airlie , Simona Vetter , linux-sunxi@lists.linux.dev, imx@lists.linux.dev, dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH 4/4] drm/imx/dcss: plane: Switch to drm_fb_dma_get_gem_clipped_addr() Date: Tue, 8 Sep 2026 17:07:43 +0800 Message-ID: <20260908090745.1089143-5-wenst@chromium.org> X-Mailer: git-send-email 2.55.0.979.g7e5102b832-goog In-Reply-To: <20260908090745.1089143-1-wenst@chromium.org> References: <20260908090745.1089143-1-wenst@chromium.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit The i.MX DCSS driver is open coding drm_fb_dma_get_gem_clipped_addr(), with only a slight difference of rounding down the X offset for the first plane if the format is packed, sub-sampled YUV. This is likely to correct the buffer address to the first pixel of the 2-pixel group. Otherwise the hardware will start the scan-out from the second pixel, which leads to the U/V components getting swapped around, and the chroma component of the next pixel group being used. Switch to drm_fb_dma_get_gem_clipped_addr(), and offset the address by a pixel if the X offset is odd. Signed-off-by: Chen-Yu Tsai --- drivers/gpu/drm/imx/dcss/dcss-plane.c | 34 +++++++++++---------------- 1 file changed, 14 insertions(+), 20 deletions(-) diff --git a/drivers/gpu/drm/imx/dcss/dcss-plane.c b/drivers/gpu/drm/imx/dcss/dcss-plane.c index 303e93fd036c..580d9cfb4053 100644 --- a/drivers/gpu/drm/imx/dcss/dcss-plane.c +++ b/drivers/gpu/drm/imx/dcss/dcss-plane.c @@ -219,28 +219,22 @@ static void dcss_plane_atomic_set_base(struct dcss_plane *dcss_plane) struct dcss_dev *dcss = plane->dev->dev_private; struct drm_framebuffer *fb = state->fb; const struct drm_format_info *format = fb->format; - struct drm_gem_dma_object *dma_obj = drm_fb_dma_get_gem_obj(fb, 0); unsigned long p1_ba = 0, p2_ba = 0; - if (!format->is_yuv || - format->format == DRM_FORMAT_NV12 || - format->format == DRM_FORMAT_NV21) - p1_ba = dma_obj->dma_addr + fb->offsets[0] + - fb->pitches[0] * (state->src.y1 >> 16) + - format->char_per_block[0] * (state->src.x1 >> 16); - else if (format->format == DRM_FORMAT_UYVY || - format->format == DRM_FORMAT_VYUY || - format->format == DRM_FORMAT_YUYV || - format->format == DRM_FORMAT_YVYU) - p1_ba = dma_obj->dma_addr + fb->offsets[0] + - fb->pitches[0] * (state->src.y1 >> 16) + - 2 * format->char_per_block[0] * (state->src.x1 >> 17); - - if (format->format == DRM_FORMAT_NV12 || - format->format == DRM_FORMAT_NV21) - p2_ba = dma_obj->dma_addr + fb->offsets[1] + - (((fb->pitches[1] >> 1) * (state->src.y1 >> 17) + - (state->src.x1 >> 17)) << 1); + p1_ba = drm_fb_dma_get_gem_clipped_addr(fb, state, 0); + + /* + * TODO fix address until helpers know packed, sub-sampled YUV format block size + * + * The buffer address for packed, sub-sampled YUV formats such as DRM_FORMAT_UYVY + * need to be on the first pixel of each pixel group or block. Otherwise the first + * pixel of the next pixel group is read and the U/V values get swapped around. + */ + if (drm_format_info_is_yuv_packed(format)) + p1_ba -= ((state->src.x1 >> 16) & 1) * format->cpp[0]; + + if (format->num_planes > 1) + p2_ba = drm_fb_dma_get_gem_clipped_addr(fb, state, 1); dcss_dpr_addr_set(dcss->dpr, dcss_plane->ch_num, p1_ba, p2_ba, fb->pitches[0]); -- 2.55.0.979.g7e5102b832-goog