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Bae" To: linux-kernel@vger.kernel.org Cc: x86@kernel.org, tglx@kernel.org, mingo@redhat.com, bp@alien8.de, dave.hansen@linux.intel.com, hpa@zytor.com, andrew.cooper3@citrix.com, arjan.van.de.ven@intel.com, sohil.mehta@intel.com, chang.seok.bae@intel.com, stable@vger.kernel.org Subject: [PATCH v2] x86/microcode/intel: Reject problematic loading on Granite Rapids systems Date: Tue, 8 Sep 2026 22:32:09 +0000 Message-ID: <20260908223209.916758-1-chang.seok.bae@intel.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260901231634.714144-2-chang.seok.bae@intel.com> References: <20260901231634.714144-2-chang.seok.bae@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Microcode updates can usually jump revisions. However, there is an erratum on Granite Rapids systems. If they "jump over" to revision 0x1000405 or later, they result in #MC. Prevent loading 0x1000405 or later unless the running revision is already at least 0x1000405. Apply this blocking to both early- and late-loading paths. Signed-off-by: Chang S. Bae Cc: --- V1 -> V2: * Cut the code comments and print messages (Boris) * Rename the new function and keep the old function as it-is (Boris) * Rewrote the changelog (Dave) * Add `revision` in the error messages (Sohil) --- arch/x86/kernel/cpu/microcode/intel.c | 32 +++++++++++++++++++++++++++ 1 file changed, 32 insertions(+) diff --git a/arch/x86/kernel/cpu/microcode/intel.c b/arch/x86/kernel/cpu/microcode/intel.c index 1142183c950c..61ad280497e9 100644 --- a/arch/x86/kernel/cpu/microcode/intel.c +++ b/arch/x86/kernel/cpu/microcode/intel.c @@ -309,6 +309,32 @@ static void save_microcode_patch(struct microcode_intel *patch) pr_err("Unable to allocate microcode memory size: %u\n", size); } +static bool revision_banned(struct cpu_signature *sig, u32 rev) +{ + u32 vfm = IFM(x86_family(sig->sig), x86_model(sig->sig)); + + /* + * Revision 0x1000405 contains prerequisite changes for subsequent + * microcode updates on Granite Rapids systems. Updates directly from + * an older revision to this or a newer one can result in #MC. This is + * documented item GNR98, #835486 (Intel Xeon 6900/6700/6500-Series + * Processors with P-Cores). + */ + if (vfm == INTEL_GRANITERAPIDS_X && + x86_stepping(sig->sig) == 1 && + sig->pf & 0x95 && + sig->rev < 0x1000405 && + rev >= 0x1000405) { + if (rev == 0x1000405) + pr_err_once("Erratum GNR98: revision 0x1000405 is not loadable.\n"); + else + pr_err_once("Erratum GNR98: revision 0x1000405 is required before 0x%x.\n", rev); + return true; + } + + return false; +} + /* Scan blob for microcode matching the boot CPUs family, model, stepping */ static __init struct microcode_intel *scan_microcode(void *data, size_t size, struct ucode_cpu_info *uci, @@ -330,6 +356,9 @@ static __init struct microcode_intel *scan_microcode(void *data, size_t size, if (!intel_find_matching_signature(data, &uci->cpu_sig)) continue; + if (revision_banned(&uci->cpu_sig, mc_header->rev)) + continue; + /* * For saving the early microcode, find the matching revision which * was loaded on the BSP. @@ -878,6 +907,9 @@ static enum ucode_state parse_microcode_blobs(int cpu, struct iov_iter *iter) if (!intel_find_matching_signature(mc, &uci->cpu_sig)) continue; + if (revision_banned(&uci->cpu_sig, mc_header.rev)) + continue; + is_safe = ucode_validate_minrev(&mc_header); if (force_minrev && !is_safe) continue; -- 2.53.0