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charset=US-ASCII Content-Transfer-Encoding: 7bit X-Authority-Analysis: v=2.4 cv=GKk41ONK c=1 sm=1 tr=0 ts=6aa19e40 cx=c_pps a=RP+M6JBNLl+fLTcSJhASfg==:117 a=aNnz9XPx1a4JIXSYt2cE/A==:17 a=kj9zAlcOel0A:10 a=VdqzKS8jKosA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=YMgV9FUhrdKAYTUUvYB2:22 a=Ikd4Dj_1AAAA:8 a=YF44DY9b4ahQXEfF3N0A:9 a=CjuIK1q_8ugA:10 a=iS9zxrgQBfv6-_F4QbHw:22 X-Proofpoint-ORIG-GUID: XDjK-jD73XYQIE6Zsee-L-dRegg5xROX X-Proofpoint-GUID: XDjK-jD73XYQIE6Zsee-L-dRegg5xROX X-Proofpoint-Spam-Info: AW1haW4tMjYwOTA5MDIwMCBTYWx0ZWRfX7ODLMs4OFHlj JWbSRqFuoOWNO9Y1IYJ/VCvtehghe4Bt+Vh9L/ax6xY5ZCiHcIlL4M1Pe6M9RPWbFlm0hcYEfAw Wf7z8eVhgzsLg1PCaxbuD9dekNe98zo= X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwOTA5MDIwMCBTYWx0ZWRfX6QA9KtWOpxW7 76MGWZTwjkZGKKxuKOe9spjvdpib0u1wQhS+n8Q5Tlg0DJ95TUta8S1MUhLuw3HR8j9Y3Z0EZex Lma7/P/q+G5Ptm4cQqnLQCtp1/WpxY2swQPQzqZb/8q7IieQ78FiAwcwNbLAmjrjAb9wb5410u/ 8cbhDxQHG49pfZ3R8tat0AsGAut3SfIn6u1QAP7dpjJAS87EQ07ynfQpLWKC73pqTLE8Y1cUlmz /6tNF1txJ80t3jPwY+yADtBwY5Kiemt/vI2CttHLhUVOLfPMXafGNWsdzWWTefNlTrIwYqMh1gr fZB/YjXbSjVStW9UquerfV/oQne1sQOD8+RgVCEZUE7pXyvCW7kR99/fIwA8qUdGbxvLiQNZ3kL s/BOMXi4iA6sjlKHRg/wSkgH2rwEYgDIZoP8/ffwtV4hSHXZ+aESaZJTdX1AASRaVyro2vy3WjJ uNwIqCnF209UgJtJd+g== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-09-08_03,2026-09-09_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 impostorscore=0 bulkscore=0 spamscore=0 clxscore=1015 suspectscore=0 phishscore=0 priorityscore=1501 adultscore=0 malwarescore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2609090200 On Fri, 4 Sep 2026 20:24:54 -0700 Nicolin Chen wrote: > On Thu, Sep 03, 2026 at 12:18:33PM -0700, Jonathan Cameron wrote: > > > The EVTQ, PRIQ and combined IRQ handlers are threaded and issue commands of > > > their own, e.g. a CMDQ_OP_PRI_RESP for a page request. Disabling the SMMU > > > while one is in flight hands that command to a queue consuming nothing, so > > > its poll waits out a full timeout. > > > > > > Two paths disable the SMMU while those IRQs are still requested: a failing > > > arm_smmu_device_reset() returns to a probe that disables the device itself, > > > and arm_smmu_disable_action() covers an unbind or any later probe failure. > > > Both can run after arm_smmu_setup_irqs() requested the IRQs. > > > > > > Disable those IRQs first in both paths, so that no handler is left running > > > once the SMMU goes down. > > > > Why this soluton rather than a flag to stop them queuing new work + a > > synchronize_irq() to deal with threads in flight. > > > > irq disables always worry me a little as they tend to be patching over > > something nastier. I think this works though so I'm not going to > > strongly object. > > Well, I don't see a reason to add extra flags: each irq here only > has one single source, so disable_irq() is fundamentally similar > to a flag + synchronize_irq(), but also masks the irq line, which > makes sense in the probe-revert and shutdown paths. Above all, it > is cleaner. > > If there is a solid reason for not using disable_irq() here, I'd > not mind changing that though. It is probably just my mental model that disable_irq() is normally papering over devices that can't behave well and stop sending irqs at the source end. The main difference is whether there is any potential of the unhandled irq logic kicking in. I kind of dislike relying on exactly how that works under the hood (needs a lot of irqs to trigger) for any path that we expect to actually hit. Anyhow, I don't feel that strongly about this one. Jonathan > > Thanks > Nicolin