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[94.29.32.34]) by smtp.gmail.com with ESMTPSA id 38308e7fff4ca-3a3705cd8d5sm42008571fa.37.2026.09.09.06.47.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 09 Sep 2026 06:47:19 -0700 (PDT) From: Andrey Korshunov To: devnull+hystericaldragons.proton.me@kernel.org Cc: HystericalDragons@proton.me, amadeus@jmu.edu.cn, jensenhuang@friendlyarm.com, heiko@sntech.de, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, linux-rockchip@lists.infradead.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v2 2/3] arm64: dts: rockchip: Split out the common NanoPi RK3528 parts Date: Wed, 9 Sep 2026 16:47:16 +0300 Message-ID: <20260909134716.879-1-razor1702@gmail.com> X-Mailer: git-send-email 2.54.0.windows.1 In-Reply-To: <20260907-r28s-upstream-v2-2-21ab570fc91c@proton.me> References: <20260907-r28s-upstream-v2-2-21ab570fc91c@proton.me> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On Mon Sep 7, 2026 at 4:13 PM CEST, 安容 via B4 Relay wrote: > +&mdio1 { > + rgmii_phy: ethernet-phy@1 { > + compatible = "ethernet-phy-ieee802.3-c22"; > + reg = <0x1>; > + pinctrl-names = "default"; > + pinctrl-0 = <&gmac1_rstn_l>; > + reset-assert-us = <20000>; > + reset-deassert-us = <100000>; > + reset-gpios = <&gpio4 RK_PC2 GPIO_ACTIVE_LOW>; > + }; > +}; This is carried over unchanged from the NanoPi Zero2, so not something this patch introduces, but it is worth fixing while the node is being moved, because as written the port depends on the bootloader. of_mdio_bus_register() reads the PHY ID with get_phy_device() before phy_device_register() fetches the PHY node's reset-gpios, so a PHY that the bootloader left in reset is simply not found: mdio_bus stmmac-0: MDIO device at address 1 is missing. I hit exactly that on a NanoPi R28S booted with mainline U-Boot (generic-rk3528), which does not touch that pin - the RGMII port never came up. Describing the reset on the MAC instead makes stmmac install it as mii_bus->reset, which runs before the bus is scanned: &gmac1 { snps,reset-active-low; snps,reset-delays-us = <0 20000 100000>; snps,reset-gpio = <&gpio4 RK_PC2 GPIO_ACTIVE_LOW>; }; with &gmac1_rstn_l moved to the MAC's pinctrl-0 and the three reset properties dropped from the PHY node. Then the port comes up whatever the bootloader did, on both boards. Armbian carries the same change for the NanoPi Zero2, for the same reason. I had an R28S series of my own out before I saw yours; I am dropping it. Happy to test this one on the hardware and send a Tested-by. Andrey