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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Russell King , linux-kernel@vger.kernel.org Subject: [PATCH net-next 1/7] net: dsa: motorcomm: Split xMII and SERDES port masks Date: Thu, 10 Sep 2026 03:05:29 +0800 Message-ID: <20260909190541.466476-2-mmyangfl@gmail.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260909190541.466476-1-mmyangfl@gmail.com> References: <20260909190541.466476-1-mmyangfl@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Replace external_mask with xmii_mask and serdes_mask, and advertise the interface modes it actually supports. Also move struct yt921x_info into chip.h for future use. Signed-off-by: David Yang --- drivers/net/dsa/motorcomm/chip.c | 39 ++++++++++++-------------------- drivers/net/dsa/motorcomm/chip.h | 18 +++++++++++++++ 2 files changed, 32 insertions(+), 25 deletions(-) diff --git a/drivers/net/dsa/motorcomm/chip.c b/drivers/net/dsa/motorcomm/chip.c index d663af010f43..64fdc5109cc6 100644 --- a/drivers/net/dsa/motorcomm/chip.c +++ b/drivers/net/dsa/motorcomm/chip.c @@ -96,18 +96,6 @@ static const struct yt921x_mib_desc yt921x_mib_descs[] = { MIB_DESC(1, YT921X_MIB_DATA_TX_OAM, "TxOAM"), }; -struct yt921x_info { - const char *name; - u16 major; - /* Unknown, seems to be plain enumeration */ - u8 mode; - u8 extmode; - /* Ports with integral GbE PHYs, not including MCU Port 10 */ - u16 internal_mask; - /* TODO: see comments in yt921x_dsa_phylink_get_caps() */ - u16 external_mask; -}; - #define YT921X_PORT_MASK_INTn(port) BIT(port) #define YT921X_PORT_MASK_INT0_n(n) GENMASK((n) - 1, 0) #define YT921X_PORT_MASK_EXT0 BIT(8) @@ -117,37 +105,44 @@ static const struct yt921x_info yt921x_infos[] = { { "YT9215SC", YT9215_MAJOR, 1, 0, YT921X_PORT_MASK_INT0_n(5), + YT921X_PORT_MASK_EXT1, YT921X_PORT_MASK_EXT0 | YT921X_PORT_MASK_EXT1, }, { "YT9215S", YT9215_MAJOR, 2, 0, YT921X_PORT_MASK_INT0_n(5), - YT921X_PORT_MASK_EXT0 | YT921X_PORT_MASK_EXT1, + YT921X_PORT_MASK_EXT1, + YT921X_PORT_MASK_EXT0, }, { "YT9215RB", YT9215_MAJOR, 3, 0, YT921X_PORT_MASK_INT0_n(5), YT921X_PORT_MASK_EXT0 | YT921X_PORT_MASK_EXT1, + 0, }, { "YT9214NB", YT9215_MAJOR, 3, 2, YT921X_PORT_MASK_INTn(1) | YT921X_PORT_MASK_INTn(3), - YT921X_PORT_MASK_EXT0 | YT921X_PORT_MASK_EXT1, + YT921X_PORT_MASK_EXT1, + YT921X_PORT_MASK_EXT0, }, { "YT9213NB", YT9215_MAJOR, 3, 3, YT921X_PORT_MASK_INTn(1) | YT921X_PORT_MASK_INTn(3), YT921X_PORT_MASK_EXT1, + YT921X_PORT_MASK_EXT1, }, { "YT9218N", YT9218_MAJOR, 0, 0, YT921X_PORT_MASK_INT0_n(8), 0, + 0, }, { "YT9218MB", YT9218_MAJOR, 1, 0, YT921X_PORT_MASK_INT0_n(8), YT921X_PORT_MASK_EXT0 | YT921X_PORT_MASK_EXT1, + YT921X_PORT_MASK_EXT0 | YT921X_PORT_MASK_EXT1, }, {} }; @@ -4026,15 +4021,10 @@ yt921x_dsa_phylink_get_caps(struct dsa_switch *ds, int port, */ __set_bit(PHY_INTERFACE_MODE_INTERNAL, config->supported_interfaces); - } else if (info->external_mask & BIT(port)) { - /* TODO: external ports may support SERDES only, XMII only, or - * SERDES + XMII depending on the chip. However, we can't get - * the accurate config table due to lack of document, thus - * we simply declare SERDES + XMII and rely on the correctness - * of devicetree for now. - */ + return; + } - /* SERDES */ + if (BIT(port) & info->serdes_mask) { __set_bit(PHY_INTERFACE_MODE_SGMII, config->supported_interfaces); /* REVSGMII (SGMII in PHY role) should go here, once @@ -4047,9 +4037,8 @@ yt921x_dsa_phylink_get_caps(struct dsa_switch *ds, int port, __set_bit(PHY_INTERFACE_MODE_2500BASEX, config->supported_interfaces); config->mac_capabilities |= MAC_2500FD; - - /* XMII */ - + } + if (BIT(port) & info->xmii_mask) { /* Not tested. To add support for XMII: * - Add proper interface modes below * - Handle them in yt921x_port_config() diff --git a/drivers/net/dsa/motorcomm/chip.h b/drivers/net/dsa/motorcomm/chip.h index 83cd454955dd..bc2641ded101 100644 --- a/drivers/net/dsa/motorcomm/chip.h +++ b/drivers/net/dsa/motorcomm/chip.h @@ -960,6 +960,24 @@ struct yt921x_reg_ops { int (*write)(void *context, u32 reg, u32 val); }; +struct yt921x_info { + const char *name; + u16 major; + /* Unknown, seems to be plain enumeration */ + u8 mode; + u8 extmode; + /* Ports with integral GbE PHYs, not including MCU Port 10 */ + u16 internal_mask; + /* Note: xmii_mask and serdes_mask may overlap */ + u16 xmii_mask; + u16 serdes_mask; +}; + +static inline u16 yt921x_info_ports_mask(const struct yt921x_info *info) +{ + return info->internal_mask | info->xmii_mask | info->serdes_mask; +} + struct yt921x_priv { struct dsa_switch ds; -- 2.53.0