Re: [PATCH] drm/msm: split DPU core IRQ handler under CONFIG_PREEMPT_RT

[Sebastian Andrzej Siewior <bigeasy@linutronix.de>]

On 2026-09-09 14:22:16 [+0530], vishnu.saini@oss.qualcomm.com wrote:
> From: Naman S Thaker <namathak@qti.qualcomm.com>
> 
> On a PREEMPT_RT kernel, dpu_core_irq() runs as a true hardirq handler,

*why* is this the case. The code you replaces adds some ifdefs around
request_irq() with 0 as flags. This does not make it run has hardirq.

> but it dispatches per-encoder callbacks that take sleepable locks
> (spinlock_t becomes an rt_mutex on RT, and some DRM-core locks reached
> through vblank/CRC/writeback handling are sleepable as well). Sleeping
> inside a hardirq handler is not allowed and eventually crashes the
> display, which is what happens after running GLMark2 for a while.

That is correct. That is the irq handler are threaded by default and
only non-threaded if explicitly requested.

I suggest to stick with non-threaded by default.
There is only one request_threaded_irq() as far as I can tell and this
msm_dp_display_request_irq():

|         rc = devm_request_threaded_irq(&pdev->dev, dp->irq,
|                                        msm_dp_display_irq_handler,
|                                        msm_dp_display_irq_thread,
|                                        IRQ_TYPE_LEVEL_HIGH,
|                                        "dp_display_isr", dp);

and its primary handler will be threaded on PREEMPT_RT, too. So you end
up with two threads here.

Sebastian